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TLC876C

更新时间: 2024-11-15 22:49:43
品牌 Logo 应用领域
德州仪器 - TI 转换器输出元件
页数 文件大小 规格书
23页 315K
描述
10-BIT 20 MSPS PARALLEL OUTPUT CMOS ANALOG-TO-DIGITAL CONVERTERS

TLC876C 数据手册

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TLC876M, TLC876I, TLC876C  
10-BIT 20 MSPS PARALLEL OUTPUT CMOS  
ANALOG-TO-DIGITAL CONVERTERS  
SLAS140D – JULY 1997 – REVISED MAY 2000  
DB, DW, OR PW PACKAGE  
(TOP VIEW)  
10-Bit Resolution 20 MSPS Sampling  
Analog-to-Digital Converter (ADC)  
Power Dissipation . . . 107 mW Typ  
5-V Single Supply Operation  
Differential Nonlinearity . . . ±0.5 LSB Typ  
No Missing Codes  
AGND  
AV  
DD  
AIN  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
DRV  
2
DD  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
D8  
CML  
3
REFBS  
REFBF  
NC  
4
5
Power Down (Standby) Mode  
Three State Outputs  
6
REFTF  
REFTS  
DGND  
AGND  
7
Digital I/Os Compatible With 5-V or 3.3-V  
Logic  
8
9
Adjustable Reference Input  
10  
11  
DV  
Small Outline Package (SOIC), Super Small  
Outline Package (SSOP), or Thin Small  
Outline Package (TSOP)  
DD  
D9 12  
DRGND 13  
DGND 14  
17 STBY  
16 OE  
15 CLK  
Pin Compatible With the Analog  
Devices AD876  
NC – No internal connection  
applications  
Communications  
Multimedia  
Digital Video Systems  
High-Speed DSP Front-End . . . TMS320C6x  
description  
The TLC876 is a CMOS, low-power, 10-bit, 20 MSPS analog-to-digital converter (ADC). The speed, resolution,  
and single-supply operation are suited for applications in video, multimedia, imaging, high-speed acquisition,  
and communications. The low-power and single-supply operation satisfy requirements for high-speed portable  
applications. The speed and resolution ideally suit charge-coupled device (CCD) input systems such as color  
scanners, digital copiers, electronic still cameras, and camcorders. A multistage pipelined architecture with  
output error correction logic provides for no missing codes over the full operating temperature range. Force and  
sense connections to the reference inputs provide a more accurate internal reference voltage to the reference  
resistor string.  
A standby mode of operation reduces the power to typically 15 mW. The digital I/O interfaces to either 5-V or  
3.3-V logic and the digital output terminals can be placed in a high-impedance state. The format of the output  
data is straight binary coding.  
A pipelined multistaged architecture achieves a high sample rate with low power consumption. The TLC876  
distributes the conversion over several smaller ADC sub-blocks, refining the conversion with progressively  
higher accuracy as the device passes the results from stage to stage. This distributed conversion requires a  
small fraction of the 1023 comparatorsusedinatraditionalflashADC. Asample-and-holdamplifier(SHA)within  
each of the stages permits the first stage to operate on a new input sample while the second through the fifth  
stages operate on the four preceding samples.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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