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TLC556MFKR

更新时间: 2024-11-09 13:14:47
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德州仪器 - TI /
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TLC556MFKR 数据手册

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TLC556, TLC556Y  
DUAL LinCMOS TIMERS  
SLFS047B – FEBRUARY 1984 – REVISED SEPTEMBER 1997  
D, J, OR N PACKAGE  
(TOP VIEW)  
Very Low Power Consumption . . . 2 mW  
Typ at V = 5 V  
DD  
Capable of Operation in Astable Mode  
1 DISCH  
1 THRES  
1 CONT  
1 RESET  
1 OUT  
V
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
DD  
CMOS Output Capable of Swinging Rail to  
Rail  
2 DISCH  
2 THRES  
2 CONT  
2 RESET  
2 OUT  
High Output-Current Capability  
Sink 100 mA Typ  
Source 10 mA Typ  
1 TRIG  
GND  
Output Fully Compatible With CMOS, TTL,  
and MOS  
2 TRIG  
8
Low Supply Current Reduces Spikes  
During Output Transitions  
FK PACKAGE  
(TOP VIEW)  
Single-Supply Operation From 2 V to 15 V  
Functionally interchangeable With the  
NE556; Has Same Pinout  
description  
3
2
1
20 19  
18  
2 THRES  
1 CONT  
4
5
6
7
8
The TLC556 series are monolithic timing circuits  
fabricatedusingtheTILinCMOS process, which  
provides full compatibility with CMOS, TTL, and  
MOS logic and operates at frequencies up to  
2 MHz. Accurate time delays and oscillations are  
possible with smaller, less-expensive timing  
capacitors than the NE556 because of the high  
input impedance. Power consumption is low  
across the full range of power supply voltages.  
NC  
NC  
1 RESET  
NC  
17  
2 CONT  
NC  
16  
15  
14  
2 RESET  
1 OUT  
9 10 11 12 13  
NC–No internal connection  
Like the NE556, the TLC556 has a trigger level  
approximately one-third of the supply voltage and  
athresholdlevelapproximatelytwo-thirdsofthesupplyvoltage. Theselevelscanbealteredbyuseofthecontrol  
voltage terminal. When the trigger input falls below the trigger level, the flip-flop is set and the output goes high.  
If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is  
reset and the output is low. The reset input can override all other inputs and can be used to initiate a new timing  
cycle. If the reset input is low, the flip-flop is reset and the output is low. Whenever the output is low, a  
low-impedance path is provided between the discharge terminal and ground.  
Whilethe CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the TLC556 exhibits greatly  
reduced supply-current spikes during output transitions. This minimizes the need for the large decoupling  
capacitors required by the NE556.  
These devices have internal electrostatic-discharge (ESD) protection circuits that prevent catastrophic failures  
at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015. However, care should be exercised in  
handling these devices, as exposure to ESD may result in degradation of the device parametric performance.  
All unused inputs should be tied to an appropriate logic level to prevent false triggering.  
The TLC556C is characterized for operation from 0°C to 70°C. The TLC556I is characterized for operation from  
40°C to 85°C. The TLC556M is characterized for operation over the full military temperature range of 55°C  
to 125°C.  
LinCMOS is a trademark of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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