TLC552C
DUAL LINCMOS TIMER
SLFS046 – FEBRUARY 1984 – REVISED MAY 1988
D OR N PACKAGE
(TOP VIEW)
Very Low Power Consumption . . . 2 mW
Typ at V = 5 V
DD
Capable of Operation in Astable Mode
DSCH
V
1
2
3
4
5
6
7
14
13
12
11
10
9
DD
CMOS Output Capable of Swinging Rail to
Rail
THRES
CONT
RESET
OUT
DSCH
THRES
CONT
RESET
OUT
TIMER
# 1
High Output-Current Capability
Sink 100 mA Typ
TIMER
# 2
TRIG
Source 10 mA Typ
GND
8
TRIG
Output Fully Compatible With CMOS, TTL,
and MOS
Low Supply Current Reduces Spikes
During Output Transitions
functional block diagram (each timer)
12
High-Impedance Inputs . . . 10 Ω Typ
RESET
V
DD
CONT
Single-Supply Operation From 1 V to 18 V
R
Functionally Interchangeable With the
NE556; Has Same Pinout
R1
R
THRES
1
OUT
description
S
R
The TLC552 is a dual monolithic timing circuit
fabricated using TI LinCMOS process, which
provides full compatibility with CMOS, TTL, and
MOS logic and operation at frequencies up to
2 MHz. Accurate time delays and oscillations are
possible with smaller, less-expensive timing
capacitors than the NE555 because of the high
input impedance. Power consumption is low
across the full range of power supply voltages.
TRIG
R
DSCH
GND
RESET can override TRIG and THRES.
TRIG can override THRES.
Like the NE556, the TLC552 has a trigger level
approximately one-third of the supply voltage and
a threshold level approximately two-thirds of the
supplyvoltage. Theselevelscanbealteredbyuse
of the control voltage terminal. When the trigger
input falls below the trigger level, the flip-flop is set
and the output goes high. If the trigger input is
above the trigger level and the threshold input is
above the threshold level, the flip-flop is reset and
AVAILABLE OPTIONS
SYMBOLIZATION
OPERATING
V
max
T
TEMPERATURE
RANGE
PACKAGE
SUFFIX
DEVICE
at 25°C
TLC552C
D,N
0°C to 70°C
3.8 mV
The D packages are available taped and reeled. Add the suffix R
to the device type when ordering (i.e., TLC552CDR).
the output is low. The reset input can override all other inputs and can be used to initiate a new
timing cycle. If the reset input is low, the flip-flop is reset and the output is low. Whenever the output is low, a
low-impedance path is provided between the discharge terminal and ground.
Whilethe CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the TLC552 exhibits greatly
reduced supply-current spikes during output transitions. This minimizes the need for the large decoupling
capacitors required by the NE556.
LinCMOS is a trademark of Texas Instruments Incorporated.
Copyright 1988, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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