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TLC552CNE4 PDF预览

TLC552CNE4

更新时间： 2024-11-27 04:28:07
品牌 Logo 应用领域
德州仪器 - TI 模拟波形发生功能信号电路光电二极管
页数 文件大小 规格书
10页 149K
描述
DUAL LINCMOSE⑩ TIMER

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中文翻译

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TLC552CNE4 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：DIP
包装说明：ROHS COMPLIANT, PLASTIC, DIP-14针数：14
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.74
Is Samacsys：N其他特性：IT CAN ALSO OPERATE AT 1V OR 5V OR 15V OR 18V NOMINALS
模拟集成电路 - 其他类型：RECTANGULARJESD-30 代码：R-PDIP-T14
JESD-609代码：e4长度：19.305 mm
功能数量：2端子数量：14
最高工作温度：70 °C最低工作温度：
最大输出频率：1.2 GHz封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP14,.3
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5/18 V
认证状态：Not Qualified座面最大高度：5.08 mm
子类别：Analog Waveform Generation Functions最大供电电压 (Vsup)：18 V
最小供电电压 (Vsup)：1 V标称供电电压 (Vsup)：18 V
表面贴装：NO技术：CMOS
温度等级：COMMERCIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.62 mmBase Number Matches：1

TLC552CNE4 数据手册

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TLC552C  
DUAL LINCMOS TIMER  
SLFS046 – FEBRUARY 1984 – REVISED MAY 1988  
D OR N PACKAGE  
(TOP VIEW)  
Very Low Power Consumption . . . 2 mW  
Typ at V = 5 V  
DD  
Capable of Operation in Astable Mode  
DSCH  
V
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
DD  
CMOS Output Capable of Swinging Rail to  
Rail  
THRES  
CONT  
RESET  
OUT  
DSCH  
THRES  
CONT  
RESET  
OUT  
TIMER  
# 1  
High Output-Current Capability  
Sink 100 mA Typ  
TIMER  
# 2  
TRIG  
Source 10 mA Typ  
GND  
8
TRIG  
Output Fully Compatible With CMOS, TTL,  
and MOS  
Low Supply Current Reduces Spikes  
During Output Transitions  
functional block diagram (each timer)  
12  
High-Impedance Inputs . . . 10 Ω Typ  
RESET  
V
DD  
CONT  
Single-Supply Operation From 1 V to 18 V  
R
Functionally Interchangeable With the  
NE556; Has Same Pinout  
R1  
R
THRES  
1
OUT  
description  
S
R
The TLC552 is a dual monolithic timing circuit  
fabricated using TI LinCMOS process, which  
provides full compatibility with CMOS, TTL, and  
MOS logic and operation at frequencies up to  
2 MHz. Accurate time delays and oscillations are  
possible with smaller, less-expensive timing  
capacitors than the NE555 because of the high  
input impedance. Power consumption is low  
across the full range of power supply voltages.  
TRIG  
R
DSCH  
GND  
RESET can override TRIG and THRES.  
TRIG can override THRES.  
Like the NE556, the TLC552 has a trigger level  
approximately one-third of the supply voltage and  
a threshold level approximately two-thirds of the  
supplyvoltage. Theselevelscanbealteredbyuse  
of the control voltage terminal. When the trigger  
input falls below the trigger level, the flip-flop is set  
and the output goes high. If the trigger input is  
above the trigger level and the threshold input is  
above the threshold level, the flip-flop is reset and  
AVAILABLE OPTIONS  
SYMBOLIZATION  
OPERATING  
V
max  
T
TEMPERATURE  
RANGE  
PACKAGE  
SUFFIX  
DEVICE  
at 25°C  
TLC552C  
D,N  
0°C to 70°C  
3.8 mV  
The D packages are available taped and reeled. Add the suffix R  
to the device type when ordering (i.e., TLC552CDR).  
the output is low. The reset input can override all other inputs and can be used to initiate a new  
timing cycle. If the reset input is low, the flip-flop is reset and the output is low. Whenever the output is low, a  
low-impedance path is provided between the discharge terminal and ground.  
Whilethe CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the TLC552 exhibits greatly  
reduced supply-current spikes during output transitions. This minimizes the need for the large decoupling  
capacitors required by the NE556.  
LinCMOS is a trademark of Texas Instruments Incorporated.  
Copyright 1988, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...10

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