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TLC3541 PDF预览

TLC3541

更新时间: 2024-11-01 21:54:27
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
23页 480K
描述
5-V. LOW POWER, 14-BIT, 200-KSPS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO-POWER DOWN

TLC3541 数据手册

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SLAS345 − DECEMBER 2001  
ꢄ ꢈꢉꢇ ꢁꢊ ꢋ ꢌꢊ ꢋ ꢍꢎꢇ ꢆ ꢅ ꢈꢏꢐ ꢀꢇ ꢑ ꢒ ꢒ ꢈꢓꢔꢌ ꢔ  
ꢔꢍꢎ ꢐ ꢕꢁ ꢕꢖ ꢕꢁ ꢊꢗ ꢈꢀꢊ ꢈꢘꢐ ꢗ ꢐꢀꢕꢁ ꢂꢊ ꢖꢉꢍ ꢎꢀ ꢍꢎꢔ ꢋ ꢐꢀ ꢙ ꢕꢚꢀꢊ ꢈꢌꢊ ꢋ ꢍꢎ ꢘꢊ ꢋ ꢖ  
FEATURES  
APPLICATIONS  
D
D
D
D
D
D
D
D
200-KSPS Sampling Rate  
Built-In Conversion Clock  
D
D
D
D
ATE System  
Industrial Process Control  
Measurement  
INL: 1 LSB Max  
DNL: 1 LSB Max  
Motor Control  
SINAD = 81.5 dB, SFDR = 95 dB  
THD = 94 dB at 15 kHz f , 200 KSPS  
DESCRIPTION  
in  
SPI/DSP-Compatible Serial Interfaces With  
SCLK Input up to 15 MHz  
The TLC3541 and TLC3545 are a family of high  
performance, 14-bit, low power, miniature CMOS  
analog-to-digital converters (ADCs). These devices  
operate from a single 5-V supply. Devices are available  
with single, dual, or single pseudo-differential inputs. All  
of these devices have a chip select (CS), serial clock  
(SCLK), and serial data output (SDO) that provides a  
direct 3-wire interface to the serial port of most popular  
host microprocessors (SPI interface). When interfaced  
with a DSP, a frame sync signal (FS) is used to indicate  
the start of a serial data frame on either pin 1 (CS) or pin  
7 (FS) for the TLC3541. The TLC3545 ADC connects  
to the DSP via pin 1 only (CS).  
Single 5-V Supply  
Rail-to-Rail Analog Input With 500 kHz BW  
Two Input Options Available:  
− TLC3541 − Single Channel Input  
− TLC3545 − Single Channel,  
Pseudo-Differential Input  
D
D
(TLC3541) Optimized DSP Interface −  
Requires FS Input Only  
Low Power With Auto-Power Down  
− Operating Current: 3.5 mA  
− Auto-Powerdown Current: 5 µA  
Pin Compatible 12-/14-/16-Bit Family in 8-Pin  
SOIC and MSOP Packages  
The TLC3541 and TLC3545 are designed to operate  
with low power consumption. The power saving feature  
is further enhanced with an auto-power down mode.  
This product family features a high-speed serial link to  
modern host processors with an external SCLK up to  
15 MHz. Both families use a built-in oscillator as the  
conversion clock, providing a 2.67 µs maximum  
conversion time.  
D
TLC3541  
D OR DGK Package  
(TOP VIEW)  
TLC3545  
D OR DGK Package  
(TOP VIEW)  
CS  
REF  
GND  
AIN  
1
2
3
4
8
7
6
5
SDO  
FS  
CS  
REF  
1
2
3
4
8
7
6
5
SDO  
SCLK  
V
GND  
DD  
V
DD  
SCLK  
AIN(+)  
AIN(−)  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢀꢦ  
Copyright 2001, Texas Instruments Incorporated  
ꢢ ꢦ ꢣ ꢢꢛ ꢜꢰ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢ ꢦ ꢟ ꢣ ꢫ  
1
www.ti.com  

TLC3541 替代型号

型号 品牌 替代类型 描述 数据表
TLC2551 TI

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