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TL5812IN PDF预览

TL5812IN

更新时间: 2024-11-29 01:17:19
品牌 Logo 应用领域
德州仪器 - TI 驱动
页数 文件大小 规格书
8页 118K
描述
VACUUM FLUORESCENT DISPLAY DRIVERS

TL5812IN 数据手册

 浏览型号TL5812IN的Datasheet PDF文件第2页浏览型号TL5812IN的Datasheet PDF文件第3页浏览型号TL5812IN的Datasheet PDF文件第4页浏览型号TL5812IN的Datasheet PDF文件第5页浏览型号TL5812IN的Datasheet PDF文件第6页浏览型号TL5812IN的Datasheet PDF文件第7页 
ꢀ ꢁꢂ ꢃ ꢄ ꢅꢆ ꢀꢁ ꢂꢃ ꢄꢅ ꢇ  
ꢈꢉꢊꢋ ꢋꢌ ꢍ ꢁꢋ ꢎꢏ ꢐꢑꢊꢐ ꢒꢀ ꢓꢔ ꢑꢕꢁ ꢉꢖ ꢓ ꢏꢔ ꢈ ꢐꢏ ꢑ  
SLDS011B − OCTOBER 1985 − REVISED MAY 1993  
N PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
Drives up to 20 Lines  
70-V Output Voltage Swing Capability  
40-mA Output Source Current Capability  
High-Speed Serially-Shifted Data Input  
CMOS-Compatible Inputs  
V
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
V
CC2  
CC1  
SERIAL DATA OUT  
2
DATA IN  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
Q20  
Q19  
Q18  
Q17  
Q16  
Q15  
Q14  
Q13  
Q12  
3
Direct Replacement for Sprague UCN5812A  
4
5
description  
6
7
The TL5812 and TL5812I are monolithic BIDFET  
8
integrated circuits designed to drive a dot matrix  
or segmented vacuum fluorescent display (VFD).  
Each device features a serial data output to  
cascade additional devices for large display  
arrays.  
9
10  
11  
12  
13  
14  
Q8  
Q9  
Q10  
Q11  
BLANKING  
GND  
LATCH ENABLE (STROBE)  
CLOCK  
A 20-bit data word is serially loaded into the shift  
register on the low-to-high transition of CLOCK.  
Parallel data is transferred to the output buffers  
through a 20-bit D-type latch while LATCH  
ENABLE is high and is latched when LATCH  
ENABLE is low. When BLANKING is high, all  
outputs are low.  
FN PACKAGE  
(TOP VIEW)  
The outputs are totem-pole structures formed by  
npn emitter-follower and double-diffused MOS  
(DMOS) transistors with output voltage ratings of  
70 V and a source-current capability of 40 mA. All  
inputs are CMOS compatible.  
4
3
2 1 28 27 26  
The TL5812 is characterized for operation from  
0°C to 70°C. The TL5812I is characterized for  
operation from 40°C to 85°C.  
5
25 Q2  
Q18  
6
24  
23  
22  
21  
20  
19  
Q3  
Q4  
Q5  
Q6  
Q7  
Q8  
Q17  
7
Q16  
8
Q15  
9
Q14  
10  
Q13  
11  
Q12  
12 13 14 15 16 17 18  
BIDFET − Bipolar, double-diffused, N-channel and P-channel MOS transistors on same chip. This is a patented process.  
ꢀꢢ  
Copyright 1993, Texas Instruments Incorporated  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢫ ꢚꢙ ꢝ ꢇꢇ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢦ  
ꢟꢗ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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