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TK80F08K3

更新时间： 2024-11-18 08:47:55
品牌 Logo 应用领域
东芝 - TOSHIBA 稳压器
页数 文件大小 规格书
7页 215K
描述
Swiching Regulator

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中文翻译

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TK80F08K3 技术参数

生命周期：Not Recommended包装说明：SMALL OUTLINE, R-PSSO-G2
针数：3Reach Compliance Code：unknown
ECCN代码：EAR99风险等级：5.75
雪崩能效等级（Eas）：250 mJ外壳连接：DRAIN
配置：SINGLE WITH BUILT-IN DIODE最小漏源击穿电压：75 V
最大漏极电流 (ID)：80 A最大漏源导通电阻：0.0043 Ω
FET 技术：METAL-OXIDE SEMICONDUCTORJESD-30 代码：R-PSSO-G2
元件数量：1端子数量：2
工作模式：ENHANCEMENT MODE封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
极性/信道类型：N-CHANNEL最大脉冲漏极电流 (IDM)：320 A
认证状态：Not Qualified表面贴装：YES
端子形式：GULL WING端子位置：SINGLE
晶体管应用：SWITCHING晶体管元件材料：SILICON
Base Number Matches：1

TK80F08K3 数据手册

 浏览型号TK80F08K3的Datasheet PDF文件第2页浏览型号TK80F08K3的Datasheet PDF文件第3页浏览型号TK80F08K3的Datasheet PDF文件第4页浏览型号TK80F08K3的Datasheet PDF文件第5页浏览型号TK80F08K3的Datasheet PDF文件第6页浏览型号TK80F08K3的Datasheet PDF文件第7页 
TK80F08K3  
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (U-MOSIV)  
TK80F08K3  
Swiching Regulator  
Unit: mm  
•
•
•
Low drain-source ON-resistance: R  
= 3.4 mΩ (typ.)  
DS (ON)  
10.0 ± 0.3  
9.5 ± 0.2  
Low leakage current: I  
= 10 μA (max) (V  
= 75 V)  
DSS  
DS  
0.4 ± 0.1  
Enhancement-model: V = 2.0 to 4.0 V (V  
= 10 V, I = 1 mA)  
D
th  
DS  
Absolute Maximum Ratings (Ta = 25°C)  
1.1  
0.76 ± 0.1  
1.4 ± 0.1  
Characteristics  
Drain-source voltage  
Symbol  
Rating  
Unit  
2.35 ± 0.1  
0.4 ± 0.1  
2.54 ± 0.25  
2.34 ± 0.25  
V
75  
75  
V
V
V
DSS  
1
2
3
Drain-gate voltage (R  
Gate-source voltage  
= 20 kΩ)  
V
GS  
DGR  
V
±20  
80  
GSS  
DC  
(Note 1)  
I
D
Drain current  
A
Pulse (Note 1)  
I
320  
300  
DP  
1.GATE  
2.DRAIN  
Drain power dissipation (Tc = 25°C)  
P
W
D
AS  
AR  
(HEAT SINK)  
Single pulse avalanche energy  
3. SOURCE  
E
250  
mJ  
8.0  
(Note 2)  
Avalanche current  
I
80  
30  
A
JEDEC  
JEITA  
⎯
⎯
Repetitive avalanche energy (Note 3)  
E
mJ  
°C  
°C  
AR  
Channel temperature  
(Note 4)  
T
ch  
175  
TOSHIBA  
2-10W1A  
Storage temperature range (Note 4)  
T
−55 to 175  
stg  
Weight: 1.07 g (typ.)  
Thermal Characteristics  
2
Characteristics  
Symbol  
Max  
0.5  
Unit  
Thermal resistance, channel to case  
R
°C/W  
th (ch-c)  
1
Note 1: Please use devices on condition that the channel temperature  
is below 175°C.  
Note 2:  
V
DD  
= 25 V, T = 25°C, L = 58 μH, R = 1 Ω, I  
= 80 A  
AR  
ch  
G
3
Note 3: Repetitive rating; pulse width limited by maximum channel  
temperature.  
Note 4: 175°C refers to AEC-Q101.  
Note 5: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the  
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly  
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute  
maximum ratings.  
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook  
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test  
report and estimated failure rate, etc).  
This transistor is an electrostatic sensitive device. Please handle with caution.  
1
2010-02-02  
1234567

中文翻译

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