Datasheet > TDA10046HT

TDA10046HT

更新时间： 2024-11-01 22:49:55

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
3页	328K
描述
Single-chip DVB-T channel

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数据手册

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TDA10046HT 数据手册

TDA10046HT

Single-chip DVB-T channel

decoder

Delivering a low cost system solution for DVB-T channel

decoding, the TDA10046HT single chip channel decoder

demonstrates Philips Semiconductors’ continuing leader-

ship in digital broadcast reception, offering advanced features

such as adaptive echo cancellation, fast channel scanning and

a unique ‘Pulse Killer’ algorithm that reduces impulsive noise

disturbances.

S e m i c o n d u c t o r s

The TDA10046HT performs all DVB-T channel decoding functions

from IF input to transport stream output, using an internal DSP core for

synchronization and control.Thanks to its sharp adjacent channel digital

ilter, this single-chip receiver achieves excellent performance with low

cost tuners (one SAW only). It requires only a low cost crystal oscillator

(4 MHz) as a clock source, which can be shared with the tuner.

sampling of the 1st or 2nd IF by a 10-bit ADC, the signal is converted to

baseband and passes through the FFT demodulator. Channel frequency

response is then estimated and iltered in both time and frequency

After

domains, and used to equalize the signal.

correction handles tuner phase noise.

A common phase error

The TDA10046HT implements a number of advanced features including a

high-performance ‘Pulse Killer’ algorithm to reduce the disturbing effects

of short and strong impulsive noise interference caused by electrical

domestic devices and/or car trafic. For maximum ease of use, the

TDA10046HT features fully automatic transmission parameters detection,

ultra fast scan of the whole UHF/VHF band, and fast zapping facilities.

Key features

• 2K and 8K COFDM demodulator, fully ETS 300-744 compliant

• TPS and Cell Identiier I

• 2nd or 1st IF analog input

C-bus readable

• On chip 10-bit ADC and PLL

Evaluation boards are available with most commercial tuners.They are

provided with all the necessary software including a tailored Graphical

User Interface (GUI) that allows easy evaluation and development.

• Single or dual AGC loop (with programmable takeover point)

• Adjacent channel digital iltering (only one external SAW ilter is required)

• Automatic frequency offset detection (±1, 2 or 3 standard offsets)

• Dynamic FFT window positioning, and adaptive echo equalization

• Consolidated algorithm for impulsive noise reduction

• DSP based synchronization enables on the ly irmware upgrades

• No extra-host software required

• Fast UHF/VHF band scanning

• Simultaneous tri-state parallel and serial Transport Stream interfaces

• 4 GPIO pins with ^∑

• I²C-bus interface

∆

modulator Applications

• Integrated Digital TV (iDTV)

• 5V tolerant I/O pins

• Set-Top-Boxes (STB)

• Low power consumption (450mW)

• TQFP64 package, CMOS 0.18 µm technology

• Personal Video Recorder (PVR) with DVB-T reception

• Digital TV PCI card for Personal Computers

12 3

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TDA10085	NXP	获取价格	Single chip DVB-S/DSS channel receiver
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TDA1010A-T	YAGEO	获取价格	Audio Amplifier, 9W, 1 Channel(s), 1 Func, Bipolar, PSIP9
TDA1010AU	NXP	获取价格	暂无描述

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