TC9205M
Preliminary Data Sheet
Pin Listing (continued)
No. Pin label
Type
O
Description
E3 GTxClk0
U11 Vss 3.3
H1 TxEr0
E2 TxClk0
A2 Crs0
GMII transmit clock
Digital ground for I/O
G
I/Opd Transmit Error
I
MII transmit clock
Is
Is
Is
P
I
Is
Is
MII carrier sense indication
MII collision indication
Receive Error
A3 Col0
D4 RxEr0
U8 Vdd 2.0
D3 RxClk0
D1 RxDv0
A1 RxData0_0
Digital +2.0V power supply for core
MII receive clock
GMII/MII data valid
GMII receive data - least significant nibble.
MII receive data
B3 RxData0_1
B2 RxData0_2
Is
Is
GMII receive data - least significant nibble.
MII receive data
GMII receive data - least significant nibble.
MII receive data
Digital ground for core
U16 Vss 2.0
B1 RxData0_3
G
Is
GMII receive data - least significant nibble.
MII receive data
C3 RxData0_4
C2 RxData0_5
C1 RxData0_6
D2 RxData0_7
U14 Vdd 3.3
Is
Is
GMII receive data - most significant nibble
GMII receive data - most significant nibble
GMII receive data - most significant nibble
GMII receive data - most significant nibble
Digital +3.3V power supply for I/O
Digital ground for I/O
Is
Is
P
G
O
O
O
P
O
O
O
G
U15 Vss 3.3
T1 TxData1_7
R1 TxData1_6
R2 TxData1_5
U13 Vdd 2.0
GMII transmit data - bits 7
GMII transmit data - bits 6
GMII transmit data - bits 5
Digital +2.0V power supply for core
GMII transmit data - bits 4
GMII/MII transmit data - bits 3
GMII/MII transmit data - bits 2
Digital ground for core
R3 TxData1_4
P3 TxData1_3
P2 TxData1_2
R17 Vss 2.0
P1 TxData1_1
Priclass1_1
I/Opd GMII/MII transmit data - bit 1
Priority class - most significant bit.
PriClass[1] is latched on reset
N3 TxData1_0
PriClass1_0
I/Opu GMII/MII transmit data - least significant bit
Priority class - least significant bit. Sets priority level per port basis.
PriClass[1] - '00' - port 1 low priority
PriClass[1] - '01' - port 1 has normal priority
PriClass[1] - '10' - port 1 has high priority
PriClass[1] - '11' - port 1 has very high priority
PriClass[1] is latched on reset
T3 TxEn1
M3 GTxClk1
O
O
GMII/MII transmit enable
GMII transmit clock
Confidential.
7/51
July 30, 2003
Copyright © 2003, IC Plus Corp.
TC9205M-DS-R03