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TC83C251TA24 PDF预览

TC83C251TA24

更新时间: 2024-10-02 15:54:03
品牌 Logo 应用领域
英特尔 - INTEL 时钟微控制器外围集成电路
页数 文件大小 规格书
34页 238K
描述
Microcontroller, 8-Bit, MROM, CMOS, CDIP40, CERAMIC, DIP-40

TC83C251TA24 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:40
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.84具有ADC:NO
地址总线宽度:16位大小:8
最大时钟频率:24 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:8
JESD-30 代码:R-CDIP-T40长度:50.8 mm
I/O 线路数量:32端子数量:40
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE认证状态:Not Qualified
ROM可编程性:MROM座面最大高度:5.51 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:15.24 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

TC83C251TA24 数据手册

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ADVANCE INFORMATION  
8xC251TA/TB/TP/TQ  
HIGH-PERFORMANCE CHMOS MICROCONTROLLER  
Commercial/Express  
Real-time and Programmed Wait State  
User-selectable Configurations:  
Bus Operation  
— External Wait States (0-3 wait  
states)  
— Address Range & Memory Mapping  
— Page Mode  
— Extended Data Float Timings or  
8xC251Sx Compatible AC Timings  
®
Binary-code Compatible with MCS 51  
Pin Compatible with 44-pin PLCC and  
40-pin PDIP MCS 51 Sockets  
®
Register-based MCS 251 Architecture  
— 40-byte Register File  
— Registers Accessible as Bytes,  
Words, or Double Words  
32 Programmable I/O Lines  
Eight Maskable Interrupt Sources with  
Four Programmable Priority Levels  
Enriched MCS 51 Instruction Set  
Three Flexible 16-bit Timer/counters  
Hardware Watchdog Timer  
— 16-bit and 32-bit Arithmetic and  
Logic Instructions  
— Compare and Conditional Jump  
Instructions  
— Expanded Set of Move Instructions  
Programmable Counter Array  
— High-speed Output  
— Compare/Capture Operation  
— Pulse Width Modulator  
— Watchdog Timer  
Linear Addressing  
256-Kbyte Expanded External  
Code/Data Memory Space  
Two Programmable Serial I/O Ports  
— Framing Error Detection  
ROM Options:  
16 Kbytes (TB/TQ), 8 Kbytes (TA/TP), or  
without ROM  
— Automatic Address Recognition  
High-performance CHMOS Technology  
Static Standby to 24-MHz Operation  
16-bit Internal Code Fetch  
64-Kbyte Extended Stack Space  
Complete System Development  
On-chip Data RAM Options:  
Support  
1-Kbyte (TA/TB) or 512-Byte (TP/TQ)  
— Compatible with Existing Tools  
8-bit, 2-clock External Code Fetch in  
— MCS 251 Tools Available:  
Compiler, Assembler, Debugger,  
ICE  
Page Mode  
Fast MCS 251 Instruction Pipeline  
Package Options (PDIP and PLCC)  
© INTEL CORPORATION, 1997  
November, 1997  
Order Number: 273129-001  

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