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TC7WH00FK_09 PDF预览

TC7WH00FK_09

更新时间: 2024-09-28 12:22:59
品牌 Logo 应用领域
东芝 - TOSHIBA
页数 文件大小 规格书
7页 200K
描述
Dual 2-Input NAND Gate

TC7WH00FK_09 数据手册

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TC7WH00FU/FK  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC7WH00FU,TC7WH00FK  
Dual 2-Input NAND Gate  
TC7WH00FU  
Features  
High speed operation  
: tpd = 3.7ns (typ.)  
at VCC = 5 V, C = 15pF  
L
Low power dissipation  
High noise immunity  
Operating voltage range  
: ICC = 2μA (max) at Ta = 25°C  
: V  
= V  
= 28% VCC (min)  
NIH  
NIL  
: VCC = 2 to 5.5 V  
Balanced propagation delays : tpLH tpHL  
5.5-V Tolerant inputs  
(SM8)  
TC7WH00FK  
Identical pin assignment and function with TC7W00  
Marking  
SM8  
H 00  
US8  
Product Name  
Lot No.  
WH  
00  
(US8)  
Weight  
SSOP8-P-0.65  
SSOP8-P-0.50A  
: 0.02 g (typ.)  
: 0.01 g (typ.)  
Absolute Maximum Ratings (Ta = 25°C)  
Characteristics  
Supply voltage  
Symbol  
Rating  
0.5 to 7.0  
0.5 to 7.0  
0.5 to VCC+0.5  
20  
Unit  
V
Pin Assignment (top view)  
V
CC  
DC input voltage  
V
V
IN  
1A  
1
8
V
CC  
DC output voltage  
Input diode current  
Output diode current  
DC output current  
V
V
OUT  
I
mA  
1B  
2
3
4
7
6
5
1Y  
2B  
2A  
IK  
I
±20  
±25  
(Note 1) mA  
OK  
2Y  
I
mA  
mA  
OUT  
GND  
DC V /GND current  
CC  
I
±50  
CC  
300 (SM8)  
200 (US8)  
65 to 150  
260  
Power dissipation  
P
mW  
D
Storage temperature  
T
stg  
°C  
°C  
Lead Temperature (10s)  
T
L
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the  
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if  
the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum  
ratings and the operating ranges.  
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook  
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report  
and estimated failure rate, etc).  
Note 1: V  
< GND, V > V  
OUT CC  
OUT  
1
2009-09-24  

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