Datasheet > TC7W74F(TE12L,F)

TC7W74F(TE12L,F)

更新时间： 2024-01-09 05:50:29

品牌	Logo	应用领域
东芝 - TOSHIBA		/
页数	文件大小	规格书
8页	185K
描述
Flip Flop D-Type Pos-Edge 1-Element 8-Pin SOP T/R

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中文翻译

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技术参数
数据手册

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TC7W74F(TE12L,F) 技术参数

是否Rohs认证：	符合	生命周期：	Contact Manufacturer
Reach Compliance Code：	unknown	风险等级：	5.59
Is Samacsys：	N	Base Number Matches：	1

TC7W74F(TE12L,F) 数据手册

TC7W74FU/FK

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC7W74FU, TC7W74FK

D-Type Flip Flop with Preset and Clear

The TC7W74 is a high speed C²MOS D Flip Flop fabricated

with silicon gate C²MOS technology.

TC7W74FU

It achieves the high speed operation similar to equivalent

LSTTL while maintaining the C²MOS low power dissipation.

The signal level applied to the D INPUT is transferred to Q

OUTPUT during the positive going transition of the CLOCK pulse

CLEAR and PRESET are independent of the CLOCK and are

accomplished by setting the appropriate input to an “L” level

Input is equipped with protection circuits against static discharge

or transient excess voltage.

(SM8)

TC7W74FK

Features

•

High speed: f

= 77 MHz (typ.) at V

= 5 V

MAX

Low power dissipation: I

= 2 μA (max) at Ta = 25°C

High noise immunity: V

= V

= 28% V

(min)

NIH

NIL

Output drive capability: 10 LSTTL loads

Symmetrical output impedance: |I | = I

= 4 mA (min)

∼

−

Balanced propagation delays: t

pHL

pLH

Wide operating voltage range: V

(opr) = 2 to 6 V

(US8)

Weight

Marking

SSOP8-P-0.65: 0.02 g (typ.)

SSOP8-P-0.50A: 0.01 g (typ.)

TC7W74FU

Part No.

Lot No.

7 W 7 4

TC7W74FK

Part No.

7 4

2012-11-01

12 3 4 5 6 7 8

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