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TC7MPS3125FK PDF预览

TC7MPS3125FK

更新时间： 2024-11-29 20:07:59
品牌 Logo 应用领域
东芝 - TOSHIBA 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
23页 310K
描述
IC P SERIES, DUAL 2-BIT TRANSCEIVER, TRUE OUTPUT, PDSO16, 3 MM , 0.50 MM PITCH, PLASTIC, VSSOP-16, Bus Driver/Transceiver

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TC7MPS3125FK 技术参数

生命周期：Lifetime Buy零件包装代码：SOIC
包装说明：VSSOP,针数：16
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.75其他特性：1.1V TO 2.7V SUPPLY FOR PORT A; 1.65V TO 3.6V SUPPLY FOR PORT B
系列：PJESD-30 代码：R-PDSO-G16
长度：4 mm逻辑集成电路类型：BUS TRANSCEIVER
位数：2功能数量：2
端口数量：2端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：VSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
传播延迟（tpd）：61 ns座面最大高度：1 mm
最大供电电压 (Vsup)：2.7 V最小供电电压 (Vsup)：1.1 V
标称供电电压 (Vsup)：1.2 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL宽度：3 mm
Base Number Matches：1

TC7MPS3125FK 数据手册

 浏览型号TC7MPS3125FK的Datasheet PDF文件第2页浏览型号TC7MPS3125FK的Datasheet PDF文件第3页浏览型号TC7MPS3125FK的Datasheet PDF文件第4页浏览型号TC7MPS3125FK的Datasheet PDF文件第5页浏览型号TC7MPS3125FK的Datasheet PDF文件第6页浏览型号TC7MPS3125FK的Datasheet PDF文件第7页 
TC7MPS3125FK/FTG  
TOSHIBA Digital Integrated Circuit Silicon Monolithic  
TC7MPS3125FK,TC7MPS3125FTG  
Low Voltage/Low Power 1 + 3-Bit Dual Supply Bus Transceiver  
The TC7MPS3125FK/FTG is a dual supply, advanced  
high-speed CMOS 4-bit dual supply voltage interface bus  
TC7MPS3125FK  
transceiver fabricated with silicon gate CMOS technology.  
It is also designed with over voltage tolerant inputs and  
outputs up to 3.6 V.  
Designed for use as an interface between a 1.2-V, 1.5-V, 1.8-V,  
or 2.5-V bus and a 1.8-V, 2.5-V or 3.6-V bus in mixed 1.2-V, 1.5-V,  
1.8-V or 2.5-V/1.8-V, 2.5-V or 3.6-V supply systems.  
The A-port interfaces with the 1.2-V, 1.5-V, 1.8-V or 2.5-V bus,  
the B-port with the 1.8-V, 2.5-V, 3.3-V bus.  
The direction of data transmission is determined by the level of  
the DIR input. The enable input (OE) can be used to disable the  
TC7MPS3125FTG  
device so that the buses are effectively isolated. (Note1)  
All inputs are equipped with protection circuits against static  
discharge or transient excess voltage.  
Features  
•
Bidirectional interface between 1.2-V and 1.8-V, 1.2-V and  
2.5-V, 1.2-V and 3.3-V, 1.5-V and 2.5-V, 1.5-V and 3.3-V, 1.8-V  
and 2.5-V, 1.8-V and 3.3-V or 2.5-V and 3.3-V buses.  
Weight  
•
High-speed operation: t = 6.8 ns (max) (V  
= 2.5 ± 0.2 V,  
pd  
CCA  
VSSOP16-P-0030-0.50: 0.02 g (typ.)  
VQON16-P-0303-0.50: 0.013 g (typ.)  
V
CCB  
= 3.3 ± 0.3 V)  
t
pd  
= 8.9 ns (max) (V  
= 1.8 ± 0.15 V,  
CCA  
V
CCB  
= 3.3 ± 0.3 V)  
t
t
t
t
t
t
= 10.3 ns (max) (V  
= 1.5 ± 0.1 V, V = 3.3 ± 0.3 V)  
CCB  
pd  
pd  
pd  
pd  
pd  
pd  
CCA  
= 61 ns (max) (V  
= 1.2 ± 0.1 V, V  
= 3.3 ± 0.3 V)  
CCA  
CCB  
= 9.5 ns (max) (V  
= 1.8 ± 0.15 V, V  
= 2.5 ± 0.2 V)  
= 2.5 ± 0.2 V)  
CCA  
CCB  
= 10.8 ns (max) (V  
= 1.5 ± 0.1 V, V  
CCA  
CCB  
= 60 ns (max) (V  
= 58 ns (max) (V  
= 1.2 ± 0.1 V, V  
= 1.2 ± 0.1 V, V  
= 3.0 V)  
= 2.5 ± 0.2 V)  
= 1.8 ± 0.15 V)  
CCA  
CCA  
CCB  
CCB  
•
Output current: I /I  
= ±12 mA (min) (V  
OH OL CC  
I
I
I
/I  
= ±9mA (min) (V  
= 2.3 V)  
= 1.65 V)  
= 1.4 V)  
OH OL  
CC  
/I  
= ±3 mA (min) (V  
OH OL  
CC  
CC  
/I  
= ±1mA (min) (V  
OH OL  
•
•
Latch-up performance: ±300 mA  
ESD performance:Machine model ≥ ±200 V  
Human body model ≥ ±2000 V  
•
•
Ultra-small package: VSSOP (US16), VQON16  
Low current consumption: Using the new circuit significantly reduces current consumption when OE = “H”.  
Suitable for battery-driven applications such as PDAs and cellular phones.  
•
•
Floating A-bus and B-bus are permitted. (when OE = “H”)  
3.6-V tolerant function and power-down protection provided on all inputs and outputs.  
Note 1: Do not apply a signal to any bus pins when it is in the output mode. Damage may result.  
Note: When mounting VQON package, the type of recommended flux is RA or RMA.  
1
2011-07-21  
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