Datasheet > TC74HC259AP_07

TC74HC259AP_07

更新时间： 2024-11-30 05:04:11

品牌	Logo	应用领域
东芝 - TOSHIBA		锁存器
页数	文件大小	规格书
9页	361K
描述
8-Bit Addressable Latch

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中文翻译

获取价格

数据手册

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TC74HC259AP_07 数据手册

TC74AC280P/F/FN

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74AC280P,TC74AC280F,TC74AC280FN

9-Bit Parity Generator/Checker

Note: xxxFN (JEDEC SOP) is not available in

Japan.

The TC74AC280 is an advanced high speed CMOS 9-BIT

PARITY GENERATOR fabricated with silicon gate and

double-layer metal wiring C²MOS technology.

TC74AC280P

It achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low power

dissipation.

The TC74AC280 is composed of nine data inputs (A thru I) and

odd/even parity outputs(Σ ODD and Σ EVEN).

The odd parity output is high when an odd number of data

inputs are high. The even parity output is high when an even

number of data inputs are high.

The word-length capability is easily expanded by cascading.

TC74AC280F

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

Features

•

High speed: t = 7.8 ns (typ.) at V

= 5 V

Low power dissipation: I

= 8 μA (max) at Ta = 25°C

High noise immunity: V

= V

= 28% V

(min)

NIH

NIL

TC74AC280FN

Symmetrical output impedance: |I | = I

= 24 mA (min)

Capability of driving 50 Ω

transmission lines.

∼

−

Balanced propagation delays: t

pHL

pLH

•

Wide operating voltage range: V

(opr) = 2~5.5 V

•

Pin and function compatible with 74F280

Pin Assignment

Weight

DIP14-P-300-2.54

SOP14-P-300-1.27A

SOL14-P-150-1.27

: 0.96 g (typ.)

: 0.18 g (typ.)

: 0.12 g (typ.)

NC: No connection

2007-10-01

12 3 4 5 6 7...9

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