TC74HC02AFN-ELP

更新时间： 2024-10-31 13:14:27

品牌	Logo	应用领域
东芝 - TOSHIBA		栅
页数	文件大小	规格书
8页	257K
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中文翻译

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数据手册

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TC74HC02AFN-ELP 数据手册

TC74HC02AP/AF/AFN

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74HC02AP,TC74HC02AF,TC74HC02AFN

Quad 2-Input NOR Gate

Note: xxxFN (JEDEC SOP) is not available in

Japan.

The TC74HC02A is a high speed CMOS 2-INPUT NOR GATE

fabricated with silicon gate C²MOS technology.

TC74HC02AP

TC74HC02AF

TC74HC02AFN

It achieves the high speed operation similar to equivalent

LSTTL while maintaining the CMOS low power dissipation.

The internal circuit is composed of 3 stages, including a buffer

output, which provide high noise immunity and stable output.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

Features

•

High speed: t = 6 ns (typ.) at V

= 5 V

Low power dissipation: I

= 1 μA (max) at Ta = 25°C

High noise immunity: V

= V

= 28% V

(min)

NIH

NIL

Output drive capability: 10 LSTTL loads

Symmetrical output impedance: |I | = I

= 4 mA (min)

∼

−

Balanced propagation delays: t

pHL

pLH

Wide operating voltage range: V

(opr) = 2~6 V

Pin and function compatible with 74LS02

Pin Assignment

Weight

DIP14-P-300-2.54

SOP14-P-300-1.27A

SOL14-P-150-1.27

: 0.96 g (typ.)

: 0.18 g (typ.)

: 0.12 g (typ.)

IEC Logic Symbol

2007-10-01

12 3 4 5 6 7 8

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