Datasheet > TC74AC245P_07

TC74AC245P_07

更新时间： 2024-01-14 10:52:35

品牌	Logo	应用领域
东芝 - TOSHIBA		/
页数	文件大小	规格书
9页	229K
描述
CMOS Digital Integrated Circuit Silicon Monolithic

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数据手册

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TC74AC245P_07 数据手册

TC74AC245,640P/F/FT

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74AC245P,TC74AC245F,TC74AC245FT

TC74AC640P,TC74AC640F,TC74AC640FT

Octal Bus Transceiver

TC74AC245P/F/FT 3-State, Non-Inverting

TC74AC640P/F/FT 3-State, Inverting

TC74AC245P, TC74AC640P

TC74AC245F, TC74AC640F

TC74AC245FT, TC74AC640FT

The TC74AC245, 640 are advanced high speed CMOS OCTAL

BUS TRANSCEIVERs fabricated with silicon gate and double-layer

metal wiring C²MOS technology.

They achieve the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low power

dissipation.

They are intended for two-way asynchronous communication

between data busses. The direction of data transmission is

determined by the level of the DIR input.

The enable input ( G ) can be used to disable the device so that

the busses are effectively isolated.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

Features (Note 1)(Note 2)

•

High speed: t = 3.9 ns (typ.) at V

= 5 V

Low power dissipation: I

= 8 μA (max) at Ta = 25°C

High noise immunity: V

= V

= 28% V

(min)

NIH

NIL

Symmetrical output impedance:

|I | = I = 24 mA (min)

Capability of driving 50 Ω transmission lines.

∼

−

pHL

(opr) = 2 V to 5.5 V

•

Balanced propagation delays: t

pLH

Wide operating voltage range: V

Weight

Pin and function compatible with 74F245/640

DIP20-P-300-2.54A

SOP20-P-300-1.27A

TSSOP20-P-0044-0.65A

: 1.30 g (typ.)

: 0.22 g (typ.)

: 0.08 g (typ.)

Note 1: Do not apply a signal to any bus terminal when it is in

the output mode. Damage may result.

Note 2: All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull

down resistors.

2007-10-01

12 3 4 5 6 7...9

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