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TC4030BP(N,F) PDF预览

TC4030BP(N,F)

更新时间: 2024-11-04 19:49:43
品牌 Logo 应用领域
东芝 - TOSHIBA 光电二极管逻辑集成电路石英晶振
页数 文件大小 规格书
7页 164K
描述
XOR Gate

TC4030BP(N,F) 技术参数

生命周期:Active包装说明:DIP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.65系列:4000/14000/40000
JESD-30 代码:R-PDIP-T14长度:19.25 mm
逻辑集成电路类型:XOR GATE功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
传播延迟(tpd):280 ns座面最大高度:4.45 mm
最大供电电压 (Vsup):18 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
Base Number Matches:1

TC4030BP(N,F) 数据手册

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TC4030BP/BF  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC4030BP, TC4030BF  
TC4030B Quad Exclusive-OR Gate  
TC4030B contains four circuits of exclusive OR gates. Since the  
buffers of two stage inverters are provided for all the outputs, the  
input/output voltage characteristic has been improved and the  
noise immunity has been also improved. And increase of  
transmission time due to load capacity increase is kept  
minimum.  
TC4030BP  
Wide variety of applicaitons are offerred, such as digital  
comparators and parity circuits.  
Pin Assignment  
TC4030BF  
Weight  
DIP14-P-300-2.54  
SOP14-P-300-1.27A  
: 0.96 g (typ.)  
: 0.18 g (typ.)  
Truth Table  
Inputs  
Output  
A
L
B
L
X
L
L
H
L
H
H
L
H
H
H
Circuit Diagram  
1/4 TC4030B  
Start of commercial production  
1978-04  
1
2014-03-01  

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