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T5322-100M PDF预览

T5322-100M

更新时间: 2024-11-24 04:38:15
品牌 Logo 应用领域
西迪斯 - CTS /
页数 文件大小 规格书
5页 242K
描述
HCMOS Output Clock Oscillator, 1MHz Min, 100MHz Max, 100MHz Nom, ROHS COMPLIANT, HERMETIC SEALED, CERAMIC, SMD, LCC-4

T5322-100M 技术参数

是否无铅: 不含铅生命周期:Transferred
Reach Compliance Code:unknown风险等级:5.71
Base Number Matches:1

T5322-100M 数据手册

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T5321 Series  
T5421 Series  
5x7 mm Surface Mount High Reliability  
Tristate/Non-Tristate, 1MHz to 100MHz  
Features  
RoHS Status  
Leadless chip carrier package is hermetically  
sealed for superior aging and field performance  
Crystal angle controlled to ±1 minute for excellent  
temperature stability  
168 hour Class B burn-in and extensive  
environmental testing for best performance in  
rugged field environments  
Start-up time <10 ms, typical  
Tristate option available  
Calculated MTBF is 3.8 x 106 hours at 125°C  
Application  
Surface Mounted PCB projects requiring high  
reliability HCMOS clock waveforms  
Description:  
These high reliability oscillators provide HCMOS clock waveforms for applications subjected to the most  
stringent environmental conditions. They are mechanically robust and weigh less than 0.2 grams. This  
5x7mm SMD package has a hermetic seal, thus ensuring the integrity of the part. Each oscillator is burned-in  
at 125°C for 168 hours, temperature cycled and centrifuged then fully tested in accordance with Table 1.  
Reliability tests are performed per Table 2.  
Electrical Specifications  
Parameter  
Symbol  
Condition  
Min  
Typ  
Max Unit  
Note  
Frequency Range  
F
1
100  
MHz  
See  
Chart  
Vs. Operating Temperature  
25  
75  
Frequency Stability  
F/F  
ppm  
Aging 1st Year  
3  
1  
After 1st Year  
Operating  
Temperature Range  
Input Voltage  
Input Current  
Waveform  
See  
Chart  
T
-55  
+125  
C  
VCC  
ICC  
3.00  
3.30  
3.6  
16  
V
mA  
Measured at 50% VDD  
40/60 45/55 60/40  
%
Symmetry  
CMOS, 15pF,  
20% to 80% (<60MHz)  
20% to 80% (60MHz)  
CMOS, 30pF,  
3.0  
2.0  
4.0  
2.5  
Rise / Fall Time  
Tr/Tf  
ns  
20% to 80% (<60MHz)  
20% to 80% (60MHz)  
4.0  
3.0  
5.0  
4.5  
“Zero”  
Level  
“One”  
Level  
Sinking 16mA  
0.4  
Output Level  
V
Sourcing 10mA  
VDD-0.4  
Input Requirement  
for Pin.1  
Output enable - pin 1 may float or 2.8V min (sourcing 400 uA)  
Output disable (Tristate)pin 1 requires 0.4V max (sinking 400 uA)  
75 South Street, Hopkinton, MA 01748 • 800-982-5737 • 508-435-6831 • FAX 508-497-6377 • www.ctsvalpey.com • RevG1014  
Specifications are subject to change without notice  
1

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