Datasheet > T15V2M08A-100C

T15V2M08A-100C

更新时间： 2024-11-23 22:42:35

品牌	Logo	应用领域
TMT		/
页数	文件大小	规格书
12页	85K
描述
256K X 8 LOW POWER CMOS STATIC RAM

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中文翻译

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技术参数
数据手册

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T15V2M08A-100C 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.8
Base Number Matches：	1

T15V2M08A-100C 数据手册

Preliminary T15V2M08A

256K X 8 LOW POWER

CMOS STATIC RAM

SRAM

FEATURES

Low-power consumption

GENERAL DESCRIPTION

The T15V2M08A is a very Low Power

CMOS Static RAMorganizedas 262,144 words by

8 bits . This device is fabricated by high

performance CMOS technology. It can be

operated under wide power supply voltage range

from +2.7V to +3.6V.

- Active: 40mA at 55ns

- Stand-by: 5uA (CMOS input/output)

55/70/100 ns access time

Equal access and cycle time

Single +2.7V to 3.6V Power Supply

TTL compatible , Tri-state output

Common I/O capability

The T15V2M08A inputs and three-state

outputs are TTL compatible and allow for direct

interfacing with common system bus structures.

Data retention is guaranteed at a power supply

voltage as low as 2V.

Automatic power-down when deselected

Available in 32-pin TSOP-I (8x20mm) ,

TSOP-I(8x13.4mm) , 48-pin CSP packages

PART NUMBER EXAMPLES

Vcc

Vss

PART NO.

PACKAGE CODE

H = TSOP-I(8x20)

P= TSOP-I(8x13.4)

T15V2M08A-55H

T15V2M08A-70P

CORE

DECODER

ARRAY

T15V2M08A-100C C = CSP

A17

I/O1

CONTROL

CIRCUIT

DATA I/O

CE1

CE2

I/O8

BLOCK DIAGRAM

Taiwan Memory Technology, Inc. reserves the right

to change products or specifications without notice.

P. 1

Publication Date: MAR. 2001

Revision:0.A

12 3 4 5 6 7...12

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