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SY88773VEY

更新时间： 2024-11-09 19:46:15
品牌 Logo 应用领域
美国微芯 - MICROCHIP ATM异步传输模式电信光电二极管电信集成电路
页数 文件大小 规格书
11页 117K
描述
ATM/SONET/SDH SUPPORT CIRCUIT, PDSO10

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SY88773VEY 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：LEAD FREE, MSOP-10Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.24
JESD-30 代码：S-PDSO-G10JESD-609代码：e4
长度：3 mm湿度敏感等级：3
功能数量：1端子数量：10
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：HTSSOP
封装形状：SQUARE封装形式：SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：1.1 mm标称供电电压：3.3 V
表面贴装：YES电信集成电路类型：ATM/SONET/SDH SUPPORT CIRCUIT
温度等级：INDUSTRIAL端子面层：NICKEL PALLADIUM GOLD
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：40
宽度：3 mmBase Number Matches：1

SY88773VEY 数据手册

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3.3V/5V 3.2Gbps CML  
LOW-POWER LIMITING POST  
AMPLIFIER WITH TTL LOS  
SY88773V  
DESCRIPTION  
FEATURES  
■ Multi-rate up to 3.2Gbps operation  
■ Wide gain-bandwidth product  
• 38dB differential gain  
The SY88773V low-power, limiting post amplifier is  
designed for use in fiber optic receivers. The device connects  
to typical transimpedance amplifiers (TIAs). The linear signal  
output from TIAs can contain significant amounts of noise  
and may vary in amplitude over time. The SY88773V  
• 2GHz 3dB bandwidth  
quantizes these signals and outputs typically 800mV  
voltage-limited waveforms.  
The SY88773V operates from a single +3.3V ±10% or  
+5V ±10% power supply, over an industrial temperature  
range of –40°C to +85°C. With its wide bandwidth and high  
gain, signals with data rates up to 3.2Gbps and as small as  
PP  
■ Low noise 50Ω CML data outputs  
• 800mV output swing  
PP  
• 60ps edge rates  
• 5ps  
typ. random jitter  
(RMS)  
• 15ps  
typ. deterministic jitter  
10mV can be amplified to drive devices with CML inputs  
pp  
(PP)  
or AC-coupled PECL inputs.  
■ Chatter-free, Loss-of-Signal (LOS) output  
• 4.6dB electrical hysteresis  
The SY88773V incorporates a loss-of-signal (LOS), open-  
collector TTL output with internal 4.75kΩ pull-up resistor. A  
programmable, loss-of-signal level set pin (LOSLVL) sets  
the sensitivity of the input amplitude detection. LOS asserts  
high if the input amplitude falls below the threshold set by  
LOSLVL and de-asserts low otherwise. LOS can be fed  
back to the enable (/EN) input to maintain output stability  
under a loss-of-signal condition. /EN de-asserts the true  
output signal without removing the input signal. Typically  
4.6dB LOS hysteresis is provided to prevent chattering.  
Please see Micrel’s website at www.micrel.com for a  
complete selection of optical module ICs. The following table  
summarizes the differences between devices in Micrel’s  
latest family of Limiting Amplifiers.  
• OC-TTL output with internal 4.75kΩ pull-up  
resistor  
■ Programmable LOS sensitivity using single external  
resistor  
■ Integrated input bias reference  
■ TTL /EN input allows feedback from LOS  
■ Wide operating range  
• Single 3.3V ±10% or 5V ±10% power supply  
• –40°C to +85°C industrial temperature range  
■ Available in tiny 10-pin EPAD-MSOP and  
All support documentation can be found on Micrel’s web  
site at www.micrel.com.  
16-pin MLF™ packages  
Integrated 50Ω  
Part Number Input Termination or SD or HIGH Enable  
LOS  
Active LOW  
APPLICATIONS  
SY88773V  
SY88823V  
SY88843V  
SY88973V  
No  
LOS  
SD  
LOW  
HIGH  
HIGH  
LOW  
■ 1.25Gbps and 2.5Gbps Gigabit Ethernet  
■ 1.062Gbps and 2.125Gbps Fibre Channel  
No  
Yes  
Yes  
SD  
■ 155Mbps, 622Gbps, 1.25Gbps, and 2.5Gbps SONET/  
SDH  
LOS  
■ Gigabit interface converter (GBIC)  
Table 1. Limiting Amplifiers Selection Guide  
■ Small form factor (SFF) and small form factor  
TYPICAL PERFORMANCE  
pluggable (SFP) transceivers  
■ Parallel 10G Ethernet  
3.3V, 25°C, 10mVpp Input  
@3.2Gbps 231–1 PRBS, RLOAD = 50Ω to VCC  
■ High-gain line driver and line receiver  
TIME (50ps/div.)  
Micro LeadFrame and MLF are trademarks of Amkor Technology  
Rev.: C  
Amendment: /0  
M9999-110905  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: November2005  
1234567...11

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