SY10E163JC

更新时间： 2024-11-28 22:34:47

品牌	Logo	应用领域
麦瑞 - MICREL		复用器逻辑集成电路
页数	文件大小	规格书
4页	62K
描述
2-BIT 8:1 MULTIPLEXER

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中文翻译

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数据手册

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SY10E163JC 数据手册

2-BIT 8:1

MULTIPLEXER

SY10E163

SY100E163

FEATURES

DESCRIPTION

■ 850ps max. propagation delay

■ Extended 100E VEE range of –4.2V to –5.5V

■ Differential outputs

The SY10/100E163 offer two 8:1 multiplexers designed

for use in new, high-performance ECL systems. The E163

has differential outputs and common select inputs. The

select inputs (SEL0, SEL1, SEL2) determine which one of

the eight data inputs (A0–A7, B0–B7) is propagated to the

output.

■ Internal 75KΩ input pulldown resistors

■ Fully compatible with industry standard 10KH,

100K ECL levels

■ Fully compatible with Motorola MC10E/100E163

■ Available in 28-pin PLCC package

PIN CONFIGURATION

BLOCK DIAGRAM

25 24 23 22 21 20 19

SEL

VCC

PLCC

TOP VIEW

J28-1

VEE

SEL

VCCO

SEL

10 11

SEL

TO SIDE B

PIN NAMES

Function

A0–A7

A Data Inputs (D)

B Data Inputs (D)

Select Inputs

B0–B7

SEL0, 1, 2

QA, QB

VCCO

True Outputs

Inverting Outputs

VCC to Output

Rev.: C

Amendment: /1

Issue Date: February, 1998

12 3 4

中文翻译

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