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SY100EP111U PDF预览

SY100EP111U

更新时间: 2024-11-04 22:42:35
品牌 Logo 应用领域
麦瑞 - MICREL 时钟驱动器
页数 文件大小 规格书
9页 97K
描述
2.5 V/ 3.3V 1:10 DIFFERENTIAL LVPECL /LVECL/HSTL CLOCK DRIVER

SY100EP111U 数据手册

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2.5V/3.3V 1:10 DIFFERENTIAL  
Precision Edge™  
SY100EP111U  
LVPECL/LVECL/HSTL CLOCK DRIVER  
FEATURES  
2.5V and 3.3V power supply options  
Guaranteed AC parameters over temperature:  
• f = 3GHz  
Precision Edge™  
MAX  
• < 25ps output-to-output skew  
• < 250ps t / t  
DESCRIPTION  
r
f
• < 400ps propagation delay  
Wide temperature range: –40°C to +85°C  
Differential design  
The SY100EP111U is a high-speed, low skew 1-to-10  
differential fanout buffer designed for clock distribution in  
new, high-performance systems. The internal 2:1 mux  
allows the input to select between two differential clock  
sources.  
The device is specifically designed for low skew. The  
interconnect scheme and metal layout are carefully  
optimized for minimal gate-to-gate skew within the device.  
Wafer characterization and process control ensure  
consistent distribution of propagation delay from lot to lot.  
The VBB output is intended for use as a reference  
voltage for single-ended reception of ECL signals to that  
device only. When using VBB for this purpose, it is  
recommended that VBB is decoupled to VCC via a 0.01µF  
capacitor.  
V output for single-ended input applications  
BB  
Fully compatible with industry standard 100K I/O  
levels  
Available in 32-pin TQFP package  
BLOCK DIAGRAM  
Q0  
/Q0  
Q1  
/Q1  
Q2  
/Q2  
Q3  
/Q3  
Q4  
CLK0  
VEE  
75k  
0
1
/CLK0  
/Q4  
Q5  
75kΩ  
75kΩ  
VEE VCC  
/Q5  
Q6  
CLK1  
VEE  
75kΩ  
/CLK1  
/Q6  
Q7  
75kΩ  
75kΩ  
VEE VCC  
/Q7  
Q8  
CLK_SEL  
75kΩ  
VEE  
/Q8  
Q9  
VBB  
/Q9  
Precision Edge is a trademark of Micrel, Inc.  
Rev.: E  
Amendment: /1  
M9999-070104  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: July 2004  

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