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SY100ELT21ZITR PDF预览

SY100ELT21ZITR

更新时间: 2024-12-01 05:16:11
品牌 Logo 应用领域
麦瑞 - MICREL 锁存器接口集成电路光电二极管
页数 文件大小 规格书
5页 80K
描述
DIFFERENTIAL PECL-to-TTL TRANSLATOR

SY100ELT21ZITR 数据手册

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Precison Edge®  
PrecisionEdge®1  
DIFFERENTIAL  
PECL-to-TTL  
TRANSLATOR  
SY10ELT21  
SY100ELT21  
FEATURES  
„ 2.5ns typical propagation delay  
„ Low power  
®
Precision Edge  
„ Differential PECL inputs  
„ 24mA TTL outputs  
DESCRIPTION  
„ Flow-through pinouts  
„ Available in 8-pin SOIC package  
The SY10/100ELT21 are single differential PECL-to-  
TTL translators. Because PECL (Positive ECL) levels are  
used, only +5V and ground are required. The small outline  
8-lead SOIC package and low skew single gate design  
make the ELT21 ideal for applications that require the  
translation of a clock or data signal where minimal space,  
low power, and low cost are critical.  
The V output allow differential single-ended, or AC-  
BB  
coupled interface to the device. If used, the V  
output  
BB  
should be bypassed to V  
with a 0.01µF capacitor.  
CC  
The ELT21 is available in both ECL standards: the  
10ELT is compatible with positive ECL 10H logic levels,  
while the 100ELT is compatible with positive ECL 100K  
logic levels.  
PIN NAMES  
Pin  
Function  
Q
TTL Output  
D, /D  
VCC  
VBB  
GND  
Differential PECL Inputs  
+5.0V Supply  
Reference Output  
Ground  
Precision Edge is a registered trademark of Micrel, Inc.  
Rev.:  
C
Amendment: /0  
M9999-031506  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: March 2006  

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