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SW06GQ PDF预览

SW06GQ

更新时间: 2024-10-19 19:15:15
品牌 Logo 应用领域
亚德诺 - ADI 输出元件
页数 文件大小 规格书
12页 274K
描述
Quad SPST JFET Analog Switch

SW06GQ 数据手册

 浏览型号SW06GQ的Datasheet PDF文件第2页浏览型号SW06GQ的Datasheet PDF文件第3页浏览型号SW06GQ的Datasheet PDF文件第4页浏览型号SW06GQ的Datasheet PDF文件第5页浏览型号SW06GQ的Datasheet PDF文件第6页浏览型号SW06GQ的Datasheet PDF文件第7页 
Quad SPST JFET  
Analog Switch  
a
SW06  
FUNCTIO NAL BLO CK D IAGRAM  
FEATURES  
Tw o Norm ally Open and Tw o Norm ally Closed SPST  
Sw itches w ith Disable  
V+  
Sw itches Can Be Easily Configured as a Dual SPDT or  
a DPDT  
Highly Resistant to Static Discharge Destruction  
Higher Resistance to Radiation than Analog Sw itches  
Designed w ith MOS Devices  
Guaranteed RON Matching: 10% m ax  
Guaranteed Sw itching Speeds  
TON = 500 ns m ax  
12  
3
S1  
1
8
9
IN 1  
IN 2  
2
6
D1  
S2  
LEVEL  
SHIFT  
TOFF = 400 ns m ax  
7
D2  
S3  
Guaranteed Break-Before-Make Sw itching  
Low “ON” Resistance: 80 m ax  
Low RON Variation from Analog Input Voltage: 5%  
Low Total Harm onic Distortion: 0.01%  
Low Leakage Currents at High Tem perature  
TA = +125؇C: 100 nA m ax  
TA = +85؇C: 30 nA m ax  
Digital Inputs TTL/ CMOS Com patible and Independent  
of V+  
11  
IN 3  
10  
14  
D3  
S4  
16  
13  
IN 4  
DIS  
15  
D4  
4
5
Im proved Specifications and Pin Com patible to  
LF-11333/ 13333  
GND  
V–  
Dual or Single Pow er Supply Operation  
Available in Die Form  
GENERAL D ESCRIP TIO N  
T he SW06 is a four channel single-pole, single-throw analog  
switch that employs both bipolar and ion-implanted FET  
devices. T he SW06 FET switches use bipolar digital logic inputs  
which are more resistant to static electricity than CMOS devices.  
Ruggedness and reliability are inherent in the SW06 design and  
construction technology.  
Increased reliability is complemented by excellent electrical  
specifications. Potential error sources are reduced by minimizing  
“ON” resistance and controlling leakage currents at high tem-  
peratures. T he switching FET exhibits minimal RON variation  
over a 20 V analog signal range and with power supply voltage  
changes. Operation from a single positive power supply voltage  
is possible. With V+ = 36 V, V– = 0 V, the analog signal range  
will extend from ground to +32 V.  
PNP logic inputs are T T L and CMOS compatible to allow the  
SW06 to upgrade existing designs. T he logic “0” and logic “1”  
input currents are at microampere levels reducing loading on  
CMOS and T T L logic.  
REV. A  
Inform ation furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assum ed by Analog Devices for its  
use, nor for any infringem ents of patents or other rights of third parties  
which m ay result from its use. No license is granted by im plication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.  
Tel: 617/ 329-4700 Fax: 617/ 326-8703  

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