Ceramic SMT 6 Pad CMOS VCXO
SVC75C Series
7.5mm x 5.0mm
Features
• ±±0ppm (Frequency Stability) Available
• Miniature Package
Applications
• Digital TV
• DVD, STB
• CMOS
• PCMIA, XDSL
• Fundamental or PLL (Phase Lock Loop) Available
• Tape and Reel
• Broadband Access
• Base Stations
Part Numbering Guide
SVC 75 C 3 A 48 A 2 - 27.000M
FREQUENCY
MHz
TRI-STATE
SUNTSU VCXO
7.0mm x 5.0mm
CMOS
(ENABLE/DISABLE)
Blank: No Connection
PULLABILITY
± : Pin ±
5: Pin 5
A : ±150ppm
OPERATING
SUPPLY VOLTAGE
B : ±100ppm
C : ±80ppm
D : ±50ppm
TEMPERATURE RANGE
± : ±.5V±5%
07 : 0°C - +70°C
3 : 3.3V±5%
5 : 5.0V±5%
FREQUENCY STABILITY
16 : -10°C - +60°C
17 : -10°C - +70°C
±7 : -±0°C - +70°C
38 : -30°C - +85°C
48 : -40°C - +85°C
COMPLIANT
A : ±50ppm
B : ±30ppm
C : ±±5ppm
D : ±±0ppm
*E : ±15ppm
Cage Code: 4GUT4
To customize your parameters contact a Suntsu representative.
* For frequency stability option E contact a Suntsu representative.
Electrical Parameters
Frequency Range
Units
MHz
Minimum
Typical
Maximum
Remarks
1
300
Frequency Stability (Includes Initial
Tolerance at ±5°C, Frequency
Stability over Operating
Temperature, Output Load Change,
Supply Voltage Change and First
Year Aging at ±5°C.)
ppm
-±0
+±0
See part numbering guide for options.
Operating Temperature
°C
°C
V
-40
-55
+85
+1±5
±.6±5
3.465
5.±50
±5
See part numbering guide for options.
Only available with AT-Cut Fundamental.
Available with AT-Cut Fundamental and PLL.
Storage Temperature
Supply Voltage (VDD) ±.5V Option
Supply Voltage (VDD) 3.5V Option
Supply Voltage (VDD) 5.0V Option
Current (IDD) ±.5V Option
±.375
3.135
4.750
±.5
3.3
5.0
V
Only available with AT-Cut Fundamental.
V
mA
mA
±5mA max (AT-Cut Fund) & 50mA max (PLL).
Current (IDD) 3.5V Option
±5
Current (IDD) 5.0V Option
Current Voltage (VC) ±.5V Option
Current Voltage (VC) 3.5V Option
Current Voltage (Vc) 5.0V Option
Pullability
mA
V
30
±.3
3.0
4.5
±150
10
0.±
0.3
0.5
±50
V
V
ppm
%
±100
See part numbering guide for options.
Linearity
Output Load (CMOS)
pF
V
15
Output Logic HIGH Level (VOH)
Output Logic LOW Level (VOL)
Rise (TR) And Fall (TF) Time
Symmetry (Duty Cycle)
0.9*VDD
V
0.1*VDD
ns
%
5
45
50
55
Tri-State Input Voltage Enable
Tri-State Input Voltage Disable
Start-Up Time
V
V
0.7*VDD
No Connection
0.3*VDD
ms
ps
ps
10
1
Phase Jitter (1±KHz ~ ±0MHz)
Phase Jitter (1±KHz ~ ±0MHz)
AT-CUT Fundamental
PLL (Phase Lock Loop)
5
Suntsu Electronics, Inc.
142 TECHNOLOGY DR., SUITE 150
IRVINE, CA 92618
www.suntsu.com
Specifications are subject
to change without notice.
Call: +1-949-783-7300 | Fax: +1-949-783-7301