Datasheet > STW40NS15

STW40NS15

更新时间： 2024-11-20 22:07:59

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
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6页	118K
描述
N-CHANNEL 150V - 0.042ohm - 40A TO-247 MESH OVERLAY⑩ MOSFET

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STW40NS15 数据手册

STW40NS15

N-CHANNEL 150V - 0.042Ω - 40A TO-247

MESH OVERLAY™ MOSFET

PRELIMINARY DATA

TYPE

DSS

DS(on)

STW40NS15

150 V

<0.052Ω

40A

■

TYPICAL R (on) = 0.042Ω

EXTREMELY HIGH dv/dt CAPABILITY

VERY LOW INTRINSIC CAPACITANCES

GATE CHARGE MINIMIZED

DESCRIPTION

This powermos MOSFET is designed using the

company’s consolidated strip layout-based MESH

OVERLAY™ process. This technology matches

and improves the performances compared with

standard parts from various sources.

TO-247

INTERNAL SCHEMATIC DIAGRAM

APPLICATIONS

■

HIGH CURRENT SWITCHING

UNINTERRUPTIBLE POWER SUPPLY (UPS)

PRIMARYSWITCH IN ISOLATED DC-DC

CONVERTERS

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

150

±20

Unit

Drain-source Voltage (V = 0)

Drain-gate Voltage (R = 20 kΩ)

DGR

Gate- source Voltage

Drain Current (continuos) at T = 25°C

Drain Current (continuos) at T = 100°C

(1)

Drain Current (pulsed)

160

Total Dissipation at T = 25°C

180

0.933

W/°C

V/ns

°C

TOT

Derating Factor

dv/dt

Peak Diode Recovery voltage slope

Storage Temperature

–65 to 175

175

stg

Max. Operating Junction Temperature

°C

(•)Pulse width limited by safe operating area

October 2000

1/6

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

12 3 4 5 6

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