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STM8S105C4T3C

更新时间: 2024-11-07 06:14:51
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
127页 1323K
描述
Access line, 16 MHz STM8S 8-bit MCU, up to 32 Kbytes Flash, integrated EEPROM,10-bit ADC, timers, UART, SPI, I²C

STM8S105C4T3C 技术参数

生命周期:ActiveReach Compliance Code:compliant
HTS代码:8542.31.00.01风险等级:5.83
具有ADC:YES地址总线宽度:
位大小:8最大时钟频率:16 MHz
DMA 通道:NO外部数据总线宽度:
长度:7 mmI/O 线路数量:38
端子数量:48PWM 通道:YES
封装代码:LFQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH速度:16 MHz
最大供电电压:5.5 V最小供电电压:2.95 V
标称供电电压:5 V表面贴装:YES
技术:CMOS端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:7 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER

STM8S105C4T3C 数据手册

 浏览型号STM8S105C4T3C的Datasheet PDF文件第2页浏览型号STM8S105C4T3C的Datasheet PDF文件第3页浏览型号STM8S105C4T3C的Datasheet PDF文件第4页浏览型号STM8S105C4T3C的Datasheet PDF文件第5页浏览型号STM8S105C4T3C的Datasheet PDF文件第6页浏览型号STM8S105C4T3C的Datasheet PDF文件第7页 
STM8S105xx  
Access line, 16 MHz STM8S 8-bit MCU, up to 32 Kbytes Flash,  
integrated EEPROM,10-bit ADC, timers, UART, SPI, I²C  
Interrupt management  
Nested interrupt controller with 32 interrupts  
Up to 37 external interrupts on 6 vectors  
Timers  
LQFP48 7x7  
LQFP44 10x10  
UFQFPN32 5x5  
LQFP32 7x7  
2x 16-bit general purpose timers, with 2+3  
CAPCOM channels (IC, OC or PWM)  
Advanced control timer: 16-bit, 4 CAPCOM  
channels, 3 complementary outputs, dead-time  
insertion and flexible synchronization  
SDIP32 400 ml  
VFQFPN32 5x5  
8-bit basic timer with 8-bit prescaler  
Auto wake-up timer  
Features  
Core  
Window and independent watchdog timers  
16 MHz advanced STM8 core with Harvard  
architecture and 3-stage pipeline  
Communications interfaces  
UART with clock output for synchronous  
operation, Smartcard, IrDA, LIN  
Extended instruction set  
SPI interface up to 8 Mbit/s  
I2C interface up to 400 Kbit/s  
Memories  
Medium-density Flash/EEPROM:  
Program memory up to 32 Kbytes; data  
retention 20 years at 55°C after 10 kcycles  
-
-
Analog-to-digital converter (ADC)  
10-bit, ±1 LSB ADC with up to 10 multiplexed  
channels, scan mode and analog watchdog  
Data memory up to 1 Kbytes true data  
EEPROM; endurance 300 kcycles  
I/Os  
RAM: Up to 2 Kbytes  
Up to 38 I/Os on a 48-pin package including 16  
high sink outputs  
Clock, reset and supply management  
Highly robust I/O design, immune against current  
injection  
2.95 V to 5.5 V operating voltage  
Flexible clock control, 4 master clock sources:  
Low power crystal resonator oscillator  
Development support  
-
Embedded single wire interface module (SWIM)  
for fast on-chip programming and non intrusive  
debugging  
External clock input  
-
Internal, user-trimmable 16 MHz RC  
-
Internal low power 128 kHz RC  
-
Unique ID  
Clock security system with clock monitor  
96-bit unique key for each device  
Power management:  
Table 1: Device summary  
Low power modes (wait, active-halt, halt)  
-
Reference  
Part number  
Switch-off peripheral clocks individually  
-
STM8S105xx  
STM8S105K4, STM8S105K6, STM8S105S4, STM8S105S6,  
STM8S105C4, STM8S105C6  
Permanently active, low consumption power-on  
and power-down reset  
April 2010  
1/127  
DocID14771 Rev 9  
www.st.com  

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