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STLC2500 PDF预览

STLC2500

更新时间: 2024-02-28 08:33:49
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意法半导体 - STMICROELECTRONICS 蓝牙
页数 文件大小 规格书
23页 246K
描述
BLUETOOTH⑩ SINGLE CHIP

STLC2500 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:TFBGA,针数:84
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.41JESD-30 代码:S-PBGA-B84
长度:6 mm功能数量:1
端子数量:84最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TFBGA封装形状:SQUARE
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH认证状态:Not Qualified
座面最大高度:1.2 mm标称供电电压:2.75 V
表面贴装:YES技术:CMOS
电信集成电路类型:TELECOM CIRCUIT温度等级:INDUSTRIAL
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM宽度:6 mm

STLC2500 数据手册

 浏览型号STLC2500的Datasheet PDF文件第2页浏览型号STLC2500的Datasheet PDF文件第3页浏览型号STLC2500的Datasheet PDF文件第4页浏览型号STLC2500的Datasheet PDF文件第5页浏览型号STLC2500的Datasheet PDF文件第6页浏览型号STLC2500的Datasheet PDF文件第7页 
STLC2500  
BLUETOOTH™ SINGLE CHIP  
PRELIMINARY DATA  
1
FEATURES  
Figure 1. Package  
Bluetooth™ specification compliance: V1.1 and  
V1.2  
Ericsson Licensing Technology Baseband Core  
(EBC)  
Point-to-point, point-to-multi-point (up to 7  
slaves) and scatternet capability  
Asynchronous Connection Oriented (ACL)  
logical transport link  
Synchronous Connection Oriented (SCO) link:  
2 simultaneous SCO channels  
TFBGA84  
Table 1. Order Codes  
Part Number  
Package  
STLC2500  
TFBGA84  
Support Pitch-Period Error Concealment (PPEC)  
– Improves speech quality in the vicinity of in-  
terference  
etary extensions)  
– HCI proprietary commands (e.g. peripherals  
control)  
– Improves coexistence with WLAN  
– Works at receiver, no Bluetooth implication  
Adaptive Frequency Hopping (AFH): hopping  
kernel, channel assessment as Master and as  
Slave  
Faster Connection: Interlaced scan for Page  
and Inquiry scan, first FHS without random back  
off, RSSI used to limit range  
Extended SCO (eSCO) links  
HW support for packet types  
– ACL: DM1, 3, 5 and DH1, 3, 5  
– SCO: HV1, 3 and DV  
– eSCO: EV3, 5  
Clock support  
– System clock input (digital or sine wave) at  
13, 26, 19.2 or 38.4 MHz  
– LPO clock input at 3.2, 16.384, 32 or 32.768 kHz  
ARM7TDMI CPU  
– 32-bit Core  
– AMBA (AHB-APB) bus configuration  
Patch RAM capability  
– Single HCI command for patch/upgrade download  
Single power supply with internal regulators for  
core voltage generation  
Supports 1.65 to 2.85 Volts IO systems  
Total number of external components limited to 7  
(6 decoupling capacitors and 1 filter) thanks to:  
– Fully integrated synthesizer (VCO and loop filter)  
– Integrated antenna switch  
– Low IF receiver  
Auto calibration (VCO, Filters)  
No need for calibration of the RF part  
Timer and watchdog  
Power class 2 compatible  
Ultra low power architecture with 3 different low  
power levels:  
– Sleep Mode  
– Deep Sleep Mode  
– Complete Power Down Mode  
Software Initiated Low Power Mode  
Dual Wake-up mechanism: initiated either by  
the Host or by the Bluetooth device  
Standard TFBGA-84 pins package  
Memory organization  
– On chip RAM, including provision for patches  
– On chip ROM, preloaded with SW up to HCI  
Communication interfaces  
– Fast UART  
2
DESCRIPTION  
The STLC2500 is a single chip ROM-based Blue-  
tooth solution implemented in 0.13 m ultra low  
power, low leakage CMOS technology for applica-  
tions requiring integration up to HCI level. Patch  
RAM is available enabling multiple patches/up-  
grades.  
– PCM interface  
– 4 programmable GPIOs  
– External interrupts possible through the GPIOs  
– Fast master I2C interface  
Efficient support for WLAN coexistence in  
collocated scenario  
Ciphering support up to 128 bits key  
Software support  
The STLC2500's main interfaces are UART for  
HCI transport, PCM for voice and GPIOs for con-  
trol purposes. The Radio is designed for the single  
chip requirement and for drastic power consump-  
tion reduction.  
– Lower level stack (up to HCI)  
– HCI Transport Layer: H4 (including propri-  
REV. 1  
1/23  
May 2004  
This is preliminary information on a new product now in development. Details are subject to change without notice.  

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