STK12C68
STK12C68-M SMD#5962-94599
8K x 8 AutoStore™ nvSRAM
QuantumTrap™ CMOS
Nonvolatile Static RAM
FEATURES
DESCRIPTION
• 25ns, 35ns, 45ns and 55ns Access Times
The Simtek STK12C68 is a fast static RAM with a
nonvolatile element incorporated in each static
memory cell. The SRAM can be read and written an
unlimited number of times, while independent, non-
volatile data resides in Nonvolatile Elements. Data
transfers from the SRAM to the Nonvolatile Elements
(the STORE operation) can take place automatically
on power down. A 68µF or larger capacitor tied from
VCAP to ground guarantees the STORE operation,
regardless of power-down slew rate or loss of power
from “hot swapping”. Transfers from the Nonvolatile
Elements to the SRAM (the RECALL operation) take
place automatically on restoration of power. Initia-
tion of STORE and RECALL cycles can also be soft-
ware controlled by entering specific read
sequences. A hardware STORE may be initiated with
the HSB pin.
• “Hands-off” Automatic STORE with External
68µF Capacitor on Power Down
• STORE to Nonvolatile Elements Initiated by
Hardware, Software or AutoStore™ on Power
Down
• RECALL to SRAM Initiated by Software or
Power Restore
• 10mA Typical ICC at 200ns Cycle Time
• Unlimited READ, WRITE and RECALL Cycles
• 1,000,000 STORE Cycles to Nonvolatile Ele-
ments (Commercial/Industrial)
• 100-Year Data Retention in Nonvolatile Ele-
ments (Commercial/Industrial)
• Commercial, Industrial and Military Tempera-
tures
• 28-Pin SOIC, DIP and LCC Packages
BLOCK DIAGRAM
PIN CONFIGURATIONS
V
V
CAP
CCX
1
2
3
4
5
6
7
8
V
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CAP
CCX
A
W
12
A
HSB
7
6
POWER
A
A
8
QUANTUM TRAP
128 x 512
A
A
5
9
CONTROL
A
A
4
3
11
G
A
A5
A6
A7
A8
A9
A
A
E
2
10
9
A
A
1
0
STORE
10
11
12
13
14
DQ
7
STORE/
RECALL
DQ
DQ
6
0
1
2
SS
HSB
DQ
DQ
5
STATIC RAM
DQ
DQ
4
CONTROL
RECALL
V
DQ
3
ARRAY
128 x 512
28 - LCC
28 - DIP
A11
A12
28 - SOIC
SOFTWARE
DETECT
A
- A
12
0
PIN NAMES
DQ
DQ
DQ
0
1
2
COLUMN I/O
A
- A
Address Inputs
Data In/Out
Chip Enable
Write Enable
Output Enable
Hardware Store Busy (I/O)
Power (+ 5V)
Capacitor
0
12
COLUMN DEC
DQ -DQ
0
7
DQ
3
4
E
W
G
DQ
DQ
DQ
DQ
5
6
7
A
A A
A A
1 4
2 3
A
10
0
G
HSB
E
W
V
V
V
CCX
CAP
SS
Ground
October 2003
1
Document Control # ML0008 rev 0.4