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STK10C48-N35 PDF预览

STK10C48-N35

更新时间: 2024-11-12 20:22:23
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
12页 396K
描述
2KX8 NON-VOLATILE SRAM, 35ns, PDSO28, 0.300 INCH, PLASTIC, SOIC-28

STK10C48-N35 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP28,.4
针数:28Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.41
风险等级:5.36最长访问时间:35 ns
其他特性:HARDWARE STORE/RECALL; AUTOMATIC STORE TIMINGJESD-30 代码:R-PDSO-G28
JESD-609代码:e0长度:17.935 mm
内存密度:16384 bit内存集成电路类型:NON-VOLATILE SRAM
内存宽度:8功能数量:1
端子数量:28字数:2048 words
字数代码:2000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:2KX8封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP28,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified座面最大高度:2.64 mm
最大待机电流:0.00075 A子类别:SRAMs
最大压摆率:0.075 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.505 mm
Base Number Matches:1

STK10C48-N35 数据手册

 浏览型号STK10C48-N35的Datasheet PDF文件第2页浏览型号STK10C48-N35的Datasheet PDF文件第3页浏览型号STK10C48-N35的Datasheet PDF文件第4页浏览型号STK10C48-N35的Datasheet PDF文件第5页浏览型号STK10C48-N35的Datasheet PDF文件第6页浏览型号STK10C48-N35的Datasheet PDF文件第7页 
STK10C48  
2K x 8 nvSRAM  
QuantumTrap™ CMOS  
Nonvolatile Static RAM  
Obsolete - Not Recommend for new Designs  
FEATURES  
DESCRIPTION  
• 25ns, 35ns and 45ns Access Times  
STORE to Nonvolatile Elements Initiated by  
Hardware  
RECALL to SRAM Initiated by Hardware or  
Power Restore  
• Automatic STORE Timing  
• 10mA Typical ICC at 200ns Cycle Time  
• Unlimited READ, WRITE and RECALL Cycles  
• 1,000,000 STORE Cycles to Nonvolatile Ele-  
ments  
• 100-Year Data Retention over Full Industrial  
Temperature Range  
• Commercial and Industrial Temperatures  
The Simtek STK10C48 is a fast static RAM with a non-  
volatile element incorporated in each static memory  
cell. The SRAM can be read and written an unlimited  
number of times, while independent nonvolatile data  
resides in the Nonvolatile Elements. Data may easily  
be transferred from the SRAM to the Nonvolatile Ele-  
ments (the STORE operation), or from the Nonvolatile  
Elements to the SRAM (the RECALL operation), using  
the NE pin. Transfers from the Nonvolatile Elements to  
the SRAM (the RECALL operation) also take place auto-  
matically on restoration of power. The STK10C48  
combines the high performance and ease of use of a  
fast SRAM with nonvolatile data integrity.  
• 28-Pin 300 mil PDIP, 300 mil SOIC and  
350 mil SOIC Packages  
The STK10C48 features industry-standard pinout for  
nonvolatile RAMs.  
PIN CONFIGURATIONS  
BLOCK DIAGRAM  
1
NE  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
V
CC  
W
NC  
2
Quantum Trap  
32 x 512  
NC  
3
A
A
A
A
A
7
4
A
6
5
4
3
2
8
A
9
NC  
G
5
6
STORE  
A
A
A
A
A
5
6
7
8
9
7
8
A
A
E
10  
9
A
A
STATIC RAM  
ARRAY  
1
RECALL  
10  
11  
12  
13  
14  
DQ  
DQ  
DQ  
0
7
6
DQ  
0
32 x 512  
DQ  
1
2
5
28 - 300 PDIP  
28 - 300 SOIC  
28 - 350 SOIC  
DQ  
DQ  
DQ  
4
3
V
SS  
PIN NAMES  
DQ0  
DQ1  
DQ2  
DQ3  
DQ4  
COLUMN I/O  
STORE/  
RECALL  
CONTROL  
A
- A  
10  
Address Inputs  
Write Enable  
Data In/Out  
0
COLUMN DEC  
W
DQ - DQ  
0
7
E
Chip Enable  
Output Enable  
Nonvolatile Enable  
Power (+ 5V)  
Ground  
DQ5  
DQ6  
DQ7  
A3 A  
4 A10  
A0 A1 A2  
G
NE  
G
NE  
E
V
V
CC  
W
SS  
March 2006  
1
Document Control # ML0002 rev 0.2  

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