STHV748
5-level, ±±0 ꢀ, 2 A high-speed pulser
with four independent channels
Preliminary data
Features
■ High-density ultrasound transmitter
■ 0 to ±±0 ꢀ output voltage
■ Up to 20 MHz operating frequency
■ Low-power, high-voltage drivers
QFN64 9 x 9 x1.0 mm
■ 2 independently supplied half bridges for each
channel in pulse wave (PW) mode
Applications
– 5-level output waveform
– ±2 A source and sink current
– Down to 20 ps jitter
– Anti-cross conduction function
– Low 2nd harmonic distortion
– Fine-tuning on propagation delay
■ Medical ultrasound imaging
■ Pulse waveform generator
■ NDT ultrasound transmission
■ Piezoelectric transducers driver
■ Fully integrated clamping-to-ground function
– 6 Ω synchronous active clamp
Description
This monolithic, high-voltage, high-speed pulser
generator features four independent channels. It
is designed for medical ultrasound applications,
but can also be used for other piezoelectric,
capacitive or MEMS transducers. The device
comprises a controller logic interface circuit, level
translators, MOSFET gate drivers, noise blocking
diodes and high-power P-channel and N-channel
MOSFETs as output stage for each channel,
clamping-to-ground circuitry, anti-leakage, anti-
memory effect block, thermal sensor and Hꢀ
receiver switch (HꢀR_SW) which guarantees a
strong decoupling during transmission phase.
Moreover the STHꢀ748 includes self biasing and
thermal shutdown blocks (see Figure 1).
– Anti-leakage on output node
■ Dedicated half bridge for continuous wave
(CW) mode on each
– Down to 0.1 W power consumption
– ±0.6 A source and sink current
– Down to 10 ps jitter
■ Fully integrated Hꢀ receiver switch
– 13.5 Ω on resistance
– Hꢀ MOS topology to minimize current
consumption
– Up to 300 MHz BW
■ 2.4 ꢀ to 3.6 ꢀ CMOS logic interface
■ Auxiliary integrated circuits
– Noise blocking diodes
Each channel can support up to five active output
levels with two half bridges. The output stage of
each channel is able to provide ±2 A peak output
current. In order to reduce power dissipation
during continuous wave mode, the peak current is
limited to 0.6 A (a dedicated half bridge is used).
– Fully self-biaising architecture
– Anti-memory effect for all internal Hꢀ
nodes
– Thermal protection
– Stand by function
Table 1.
Device summary
■ Latch-up free due to Hꢀ SOI technology
Order code
Package
Packaging
■ ꢀery few external passive components needed
STHꢀ748QTR
QFN64
Tape and reel
January 2010
Doc ID 15450 Rev 1
1/22
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
www.st.com
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