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ST72P325J4TC/XXXRS PDF预览

ST72P325J4TC/XXXRS

更新时间： 2024-11-04 15:53:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 外围集成电路
页数 文件大小 规格书
243页 2428K
描述
MICROCONTROLLER, PQFP44, 10 X 10 MM, ROHS COMPLIANT, LQFP-44

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ST72P325J4TC/XXXRS 技术参数

生命周期：Obsolete零件包装代码：QFP
包装说明：,针数：44
Reach Compliance Code：unknown风险等级：5.84
Is Samacsys：NJESD-30 代码：S-PQFP-G44
端子数量：44封装主体材料：PLASTIC/EPOXY
封装形状：SQUARE封装形式：FLATPACK
认证状态：Not Qualified表面贴装：YES
技术：CMOS端子形式：GULL WING
端子位置：QUADuPs/uCs/外围集成电路类型：MICROCONTROLLER
Base Number Matches：1

ST72P325J4TC/XXXRS 数据手册

 浏览型号ST72P325J4TC/XXXRS的Datasheet PDF文件第2页浏览型号ST72P325J4TC/XXXRS的Datasheet PDF文件第3页浏览型号ST72P325J4TC/XXXRS的Datasheet PDF文件第4页浏览型号ST72P325J4TC/XXXRS的Datasheet PDF文件第5页浏览型号ST72P325J4TC/XXXRS的Datasheet PDF文件第6页浏览型号ST72P325J4TC/XXXRS的Datasheet PDF文件第7页 
ST72325xxx-Auto  
8-bit MCU for automotive with 16 to 60 Kbyte Flash, ADC,  
CSS, 5 timers, SPI, SCI, I2C interface  
Features  
■ Memories  
LQFP32  
7 x 7  
LQFP44  
10 x 10  
– 16 to 60 Kbyte dual voltage High Density  
Flash (HDFlash) with readout protection  
capability. In-application programming and  
in-circuit programming for HDFlash devices  
– 512 to 2048 bytes RAM  
LQFP64  
10 x 10  
LQFP64  
14 x 14  
– HDFlash endurance: 100 cycles, data  
retention 20 years  
– Two 16-bit timers with 2 input captures, 2  
output compares, external clock input on 1  
timer, PWM and pulse generator modes  
■ Clock, reset and supply management  
– Enhanced low voltage supervisor (LVD) for  
main supply and auxiliary voltage detector  
(AVD) with interrupt capability  
– Clock sources: crystal/ceramic resonator  
oscillators, internal RC oscillator and  
bypass for external clock  
– 8-bit PWM auto-reload mer with 2 input  
captures, 4 PWM outs, output compare  
and time basinterrupt, external clock with  
event detector  
■ 3 communications interfaces  
– SPI synchronous serial interface  
– SCI asynchronous serial interface  
– PLL for 2x frequency multiplication  
– 4 power saving modes: Halt, Active Halt,  
Wait and Slow  
2
– I C multimaster interface  
– Clock security system  
■ Instruction set  
■ Interrupt management  
– 8-bit data manipulation  
– 63 basic instructions  
– 17 main addressing modes  
– 8x8 unsigned multiply instruction  
– Nested interrupt controller  
– 14 interrupt vectors plus TRAP and RESET  
– Top Level Interrupt (TLI) pin on 64-pin  
devices  
■ Development tools  
– 9/6 external interrupines (on 4 vectors)  
– Full hardware/software development  
package  
■ 1 analog peripheral (low current coupling)  
– 10-bit ADC with up to 16 input ports  
– DM (debug module)  
■ Up to 48 I/O ports  
– 4/32/24 multifunctional bidirectional I/O  
lines  
Table 1.  
Device summary  
Part number  
Reference  
– 34/22/17 alternate function lines  
– 16/12/10 high sink outputs  
ST72325K4-Auto, ST72325K6-Auto,  
ST72325J4-Auto, ST72325J6-Auto,  
■ 5 timers  
ST72325xxx- ST72325J7-Auto, ST72325J9-Auto,  
Auto  
ST72325AR6-Auto, ST72325R6-Auto,  
ST72325AR7-Auto, ST72325R7-Auto,  
ST72325AR9-Auto, ST72325R9-Auto  
– Main clock controller with Real-time base,  
Beep and Clock-out capabilities  
– Configurable watchdog timer  
June 2010  
Doc ID 13770 Rev 2  
1/243  
www.st.com  
1
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