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ST72F361J9TARS PDF预览

ST72F361J9TARS

更新时间: 2024-11-01 15:53:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 时钟微控制器外围集成电路
页数 文件大小 规格书
279页 2269K
描述
8-BIT, FLASH, 8MHz, MICROCONTROLLER, PQFP44, 10 X 10 MM, ROHS COMPLIANT, LQFP-44

ST72F361J9TARS 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:QFP包装说明:10 X 10 MM, ROHS COMPLIANT, LQFP-44
针数:44Reach Compliance Code:compliant
HTS代码:8542.31.00.01风险等级:5.61
具有ADC:YES地址总线宽度:
位大小:8CPU系列:ST72
最大时钟频率:8 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:
JESD-30 代码:S-PQFP-G44长度:10 mm
I/O 线路数量:36端子数量:44
片上程序ROM宽度:8最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装等效代码:QFP44,.47SQ,32封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
RAM(字节):2048ROM(单词):61440
ROM可编程性:FLASH座面最大高度:1.6 mm
速度:8 MHz子类别:Microcontrollers
最大压摆率:12 mA最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

ST72F361J9TARS 数据手册

 浏览型号ST72F361J9TARS的Datasheet PDF文件第2页浏览型号ST72F361J9TARS的Datasheet PDF文件第3页浏览型号ST72F361J9TARS的Datasheet PDF文件第4页浏览型号ST72F361J9TARS的Datasheet PDF文件第5页浏览型号ST72F361J9TARS的Datasheet PDF文件第6页浏览型号ST72F361J9TARS的Datasheet PDF文件第7页 
ST72361xx-Auto  
8-bit MCU for automotive with Flash or ROM,  
10-bit ADC, 5 timers, SPI, LINSCI™  
Features  
Memories  
– 16 K to 60 K High Density Flash (HDFlash)  
or ROM with read-out protection capability.  
In-application programming and in-circuit  
programming for HDFlash devices  
LQFP32 7x7mm  
– 1.5 to 2 K RAM  
LQFP44 10x10mm  
LQFP64 10x10mm  
– HDFlash endurance: 100 cycles, data  
retention 20 years at 55 °C  
– Main clock controller with real-time base  
and clock output  
– Window watchdog timer  
Clock, reset and supply management  
– Low power crystal/ceramic resonator  
oscillators and bypass for external clock  
– PLL for 2 x frequency multiplication  
Up to 3 communications interfaces  
– SPI synchronous serial interface  
– 5 power saving modes: halt, auto wake up  
from halt, active halt, wait and slow  
– Master/ slave LINSCI™ asynchronous  
serial interface  
– Master only LINSCI™ asynchronous serial  
interface  
Interrupt management  
– Nested interrupt controller  
– 14 interrupt vectors plus TRAP and RESET  
– TLI top level interrupt (on 64-pin devices)  
Analog peripheral (low current coupling)  
– 10-bit A/D converter with up to 16 inputs  
– Up to 9 robust ports (low current coupling)  
– Up to 21 external interrupt lines (on 4  
vectors)  
Instruction set  
Up to 48 I/O ports  
– 8-bit data manipulation  
– 63 basic instructions  
– Up to 48 multifunctional bidirectional I/O  
lines  
– 17 main addressing modes  
– 8 x 8 unsigned multiply instruction  
– Up to 36 alternate function lines  
– Up to 6 high sink outputs  
Development tools  
5 timers  
– Full hardware/ software development  
package  
– 16-bit timer with 2 input captures, 2 output  
compares, external clock input, PWM and  
pulse generator modes  
Table 1.  
Device summary  
Part number  
– 8-bit timer with 1 or 2 input captures, 1 or 2  
output compares, PWM and pulse  
generator modes  
– 8-bit PWM auto-reload timer with 1 or 2  
input captures, 2 or 4 independent PWM  
output channels, output compare and time  
base interrupt, external clock with event  
detector  
Reference  
ST72361K4-Auto, ST72361K6-Auto,  
ST72361K7-Auto, ST72361K9-Auto,  
ST72361xx ST72361J4-Auto, ST72361J6-Auto,  
-Auto  
ST72361J7-Auto, ST72361J9-Auto,  
ST72361AR4-Auto, ST72361AR6-Auto,  
ST72361AR7-Auto, ST72361AR9-Auto  
August 2010  
Doc ID 12468 Rev 3  
1/279  
www.st.com  
1

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