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ST72F324J6T6/XXX PDF预览

ST72F324J6T6/XXX

更新时间: 2024-11-12 13:14:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存
页数 文件大小 规格书
164页 2826K
描述
IC,MICROCONTROLLER,8-BIT,ST72 CPU,CMOS,QFP,44PIN,PLASTIC

ST72F324J6T6/XXX 技术参数

是否Rohs认证:符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.84
Is Samacsys:N位大小:8
CPU系列:ST72JESD-30 代码:S-PQFP-G44
JESD-609代码:e4端子数量:44
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP44,.47SQ,32封装形状:SQUARE
封装形式:FLATPACK电源:3.3/5 V
认证状态:Not QualifiedRAM(字节):1024
ROM(单词):32768ROM可编程性:FLASH
速度:8 MHz子类别:Microcontrollers
最大压摆率:8 mA表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
Base Number Matches:1

ST72F324J6T6/XXX 数据手册

 浏览型号ST72F324J6T6/XXX的Datasheet PDF文件第2页浏览型号ST72F324J6T6/XXX的Datasheet PDF文件第3页浏览型号ST72F324J6T6/XXX的Datasheet PDF文件第4页浏览型号ST72F324J6T6/XXX的Datasheet PDF文件第5页浏览型号ST72F324J6T6/XXX的Datasheet PDF文件第6页浏览型号ST72F324J6T6/XXX的Datasheet PDF文件第7页 
ST72F324, ST72324B  
5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM,  
10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE  
PRELIMINARY DATA  
Memories  
– 8 to 32K dual voltage High Density Flash (HD-  
Flash) or ROM with read-out protection capa-  
bility. In-Application Programming and In-  
Circuit Programming for HDFlash devices  
TQFP32  
7 x 7  
– 384 to 1K bytes RAM  
TQFP44  
10 x 10  
– HDFlash endurance: 100 cycles, data reten-  
tion: 20 years at 55°C  
Clock, Reset And Supply Management  
– Enhanced low voltage supervisor (LVD) for  
main supply with programmable reset thresh-  
olds and auxiliary voltage detector (AVD) with  
interrupt capability  
– Clock sources: crystal/ceramic resonator os-  
cillators, internal RC oscillator, clock security  
system and bypass for external clock  
SDIP32  
400 mil  
SDIP42  
600 mil  
– PLL for 2x frequency multiplication  
– Four Power Saving Modes: Halt, Active-Halt,  
Wait and Slow  
Interrupt Management  
2 Communication Interfaces  
– SPI synchronous serial interface  
– SCI asynchronous serial interface  
1 Analog Peripheral (low current coupling)  
– Nested interrupt controller  
– 10 interrupt vectors plus TRAP and RESET  
– 9/6 external interrupt lines (on 4 vectors)  
Up to 32 I/O Ports  
– 10-bit ADC with up to 12 robust input ports  
– 32/24 multifunctional bidirectional I/O lines  
– 22/17 alternate function lines  
– 12/10 high sink outputs  
4 Timers  
Instruction Set  
– 8-bit Data Manipulation  
– 63 Basic Instructions  
– 17 main Addressing Modes  
– 8 x 8 Unsigned Multiply Instruction  
– Main Clock Controller with: Real time base,  
Beep and Clock-out capabilities  
– Configurable watchdog timer  
– 16-bit Timer A with: 1 input capture, 1 output  
compare, external clock input, PWM and  
pulse generator modes  
– 16-bit Timer B with: 2 input captures, 2 output  
compares, PWM and pulse generator modes  
Development Tools  
– Full hardware/software development package  
– In-Circuit Testing capability  
Device Summary  
Features  
ST72F324(J/K)6 ST72F324(J/K)4 ST72F324(J/K)2 ST72324B(J/K)6 ST72324B(J/K)4 ST72324B(J/K)2  
Program memory -  
bytes  
Flash 32K  
1024 (256)  
Flash 16K  
512 (256)  
Flash 8K  
384 (256)  
ROM 32K  
ROM 16K  
512 (256)  
ROM 8K  
RAM (stack) - bytes  
Voltage Range  
Temp. Range  
Packages  
1024 (256)  
384 (256)  
3.8V to 5.5V  
up to -40°C to +125°C  
SDIP42, TQFP44 10x10,SDIP32, TQFP32 7x7  
Rev. 2.0  
1/164  
May 2004  
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change witho1ut notice.  

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