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ST72F324BJ6B1 PDF预览

ST72F324BJ6B1

更新时间: 2024-11-12 15:53:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 时钟微控制器光电二极管外围集成电路
页数 文件大小 规格书
193页 2679K
描述
IC,MICROCONTROLLER,8-BIT,ST72 CPU,CMOS,SDIP,42PIN,PLASTIC

ST72F324BJ6B1 技术参数

生命周期:Active包装说明:SDIP, SDIP42,.6
Reach Compliance Code:compliant风险等级:5.8
具有ADC:YES地址总线宽度:
位大小:8CPU系列:ST72
最大时钟频率:16 MHzDMA 通道:NO
外部数据总线宽度:JESD-30 代码:R-PDIP-T42
长度:36.83 mmI/O 线路数量:32
端子数量:42片上程序ROM宽度:8
最高工作温度:70 °C最低工作温度:
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:SDIP封装等效代码:SDIP42,.6
封装形状:RECTANGULAR封装形式:IN-LINE, SHRINK PITCH
电源:3.8/5.5 V认证状态:Not Qualified
RAM(字节):1024ROM(单词):32768
ROM可编程性:FLASH速度:8 MHz
子类别:Microcontrollers最大压摆率:15 mA
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子节距:1.78 mm
端子位置:DUAL宽度:15.24 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

ST72F324BJ6B1 数据手册

 浏览型号ST72F324BJ6B1的Datasheet PDF文件第2页浏览型号ST72F324BJ6B1的Datasheet PDF文件第3页浏览型号ST72F324BJ6B1的Datasheet PDF文件第4页浏览型号ST72F324BJ6B1的Datasheet PDF文件第5页浏览型号ST72F324BJ6B1的Datasheet PDF文件第6页浏览型号ST72F324BJ6B1的Datasheet PDF文件第7页 
ST72324Bxx  
8-bit MCU, 3.8 to 5.5 V operating range with  
8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI  
Features  
Memories  
8 to 32 Kbyte dual voltage High Density Flash  
(HDFlash) or ROM with readout protection  
capability. In-application programming and In-  
circuit programming for HDFlash devices  
LQFP44  
10 x 10  
LQFP32  
7 x 7  
384 bytes to 1 Kbyte RAM  
HDFlash endurance: 1 kcycle at 55 °C, data  
SDIP32  
400 mil  
SDIP42  
600 mil  
retention 40 years at 85 °C  
Clock, reset and supply management  
4 timers  
Enhanced low voltage supervisor (LVD) with  
programmable reset thresholds and auxiliary  
voltage detector (AVD) with interrupt capability  
Main clock controller with real-time base, Beep  
and clock-out capabilities  
Configurable watchdog timer  
Clock sources: crystal/ceramic resonator  
16-bit Timer A with 1 input capture, 1 output  
compare, ext. clock input, PWM and pulse  
generator modes  
oscillators, int. RC osc. and ext. clock input  
PLL for 2x frequency multiplication  
4 power saving modes: Slow, Wait, Active-halt,  
16-bit Timer B with 2 input captures, 2 output  
and Halt  
compares, PWM and pulse generator modes  
Interrupt management  
2 communication interfaces  
SPI synchronous serial interface  
SCI asynchronous serial interface  
Nested interrupt controller. 10 interrupt vectors  
plus TRAP and RESET. 9/6 ext. interrupt lines  
(on 4 vectors)  
1 analog peripheral (low current coupling)  
Up to 32 I/O ports  
10-bit ADC with up to 12 input ports  
32/24 multifunctional bidirectional I/Os,  
22/17 alternate function lines,  
12/10 high sink outputs  
Development tools  
In-circuit testing capability  
Table 1.  
Device  
Device summary  
Memory  
RAM (stack)  
Voltage range Temp. range  
Package  
ST72324BK2  
ST72324BK4  
ST72324BK6  
ST72324BJ2  
ST72324BJ4  
ST72324BJ6  
Flash/ROM 8 Kbytes  
Flash/ROM 16 Kbytes  
Flash/ROM 32 Kbytes  
Flash/ROM 8 Kbytes  
Flash/ROM 16 Kbytes  
Flash/ROM 32 Kbytes  
384 (256) bytes  
512 (256) bytes  
1024 (256) bytes  
384 (256) bytes  
512 (256) bytes  
1024 (256) bytes  
LQFP32  
7x7/  
SDIP32  
up to  
3.8 to 5.5 V  
-40 to 125 °C  
LQFP44  
10x10/  
SDIP42  
March 2009  
Rev 7  
1/193  
www.st.com  
1
 
 
 
 

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