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ST72561K6T3 PDF预览

ST72561K6T3

更新时间: 2024-11-06 19:32:23
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 微控制器
页数 文件大小 规格书
263页 5919K
描述
IC,MICROCONTROLLER,8-BIT,ST72 CPU,CMOS,QFP,32PIN,PLASTIC

ST72561K6T3 技术参数

是否Rohs认证: 符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.84
位大小:8CPU系列:ST72
JESD-30 代码:S-PQFP-G32端子数量:32
片上程序ROM宽度:8最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:QFP32,.35SQ,32
封装形状:SQUARE封装形式:FLATPACK
电源:5 V认证状态:Not Qualified
RAM(字节):1024ROM(单词):32768
ROM可编程性:MROM速度:8 MHz
子类别:Microcontrollers最大压摆率:12 mA
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUADBase Number Matches:1

ST72561K6T3 数据手册

 浏览型号ST72561K6T3的Datasheet PDF文件第2页浏览型号ST72561K6T3的Datasheet PDF文件第3页浏览型号ST72561K6T3的Datasheet PDF文件第4页浏览型号ST72561K6T3的Datasheet PDF文件第5页浏览型号ST72561K6T3的Datasheet PDF文件第6页浏览型号ST72561K6T3的Datasheet PDF文件第7页 
ST72561  
8-BIT MCU WITH FLASH OR ROM,  
10-BIT ADC, 5 TIMERS, SPI, LINSCI, ACTIVE CAN  
Memories  
– 16K to 60K High Density Flash (HDFlash) or  
ROM with read-out protection capability. In-  
Application Programming and In-Circuit Pro-  
gramming for HDFlash devices  
– 1 to 2K RAM  
LQFP32  
7x7mm  
LQFP64  
14x14mm  
– HDFlash endurance: 100 cycles, data reten-  
tion 40 years at 85°C  
Clock, Reset and Supply Management  
– Low power crystal/ceramic resonator oscilla-  
tors and bypass for external clock  
– PLL for 2x frequency multiplication  
– 5 power saving modes: Halt, Auto Wake Up  
LQFP44  
10x10mm  
LQFP64  
10x10mm  
From Halt, Active Halt, Wait and Slow  
Interrupt Management  
– Nested interrupt controller  
– Main clock controller with real-time base and  
clock output  
– Window watchdog timer  
– 14 interrupt vectors plus TRAP and RESET  
– TLI top level interrupt (on 64-pin devices)  
– Up to 21 external interrupt lines (on 4 vectors)  
Up to 48 I/O Ports  
Up to 4 Communications Interfaces  
– SPI synchronous serial interface  
– Up to 48 multifunctional bidirectional I/O lines  
– Up to 36 alternate function lines  
– Up to 6 high sink outputs  
– Master/slave LINSCIasynchronous serial  
interface  
– Master-only LINSCIasynchronous serial in-  
5 Timers  
terface  
– CAN 2.0B active  
Analog Peripheral (Low Current Coupling)  
– 10-bit A/D converter with up to 16 inputs  
– Up to 9 robust ports (low current coupling)  
Instruction Set  
– 16-bit timer with 2 input captures, 2 output  
compares, external clock input, PWM and  
pulse generator modes  
– 8-bit timer with 1 or 2 input captures, 1 or 2  
output compares, PWM and pulse generator  
modes  
– 8-bit PWM auto-reload timer with 1 or 2 input  
captures, 2 or 4 independent PWM output  
channels, output compare and time base in-  
terrupt, external clock with event detector  
– 8-bit data manipulation  
– 63 basic instructions  
– 17 main addressing modes  
– 8 x 8 unsigned multiply instruction  
Development Tools  
– Full hardware/software development package  
Device Summary  
Features  
ST72(F)561(AR/J/K)9  
ST72561(AR/J/K)7  
ST72(F)561(AR/J/K)6  
Program memory - bytes  
RAM (stack) - bytes  
Operating Supply  
CPU Frequency  
60K  
48K  
2K (256)  
32K  
2K (256)  
1K (256)  
4.5V to 5.5V  
External Resonator Osc. w/ PLLx2/8 MHz  
-40°C to +125°C  
Max. Temp. Range  
Packages  
LQFP64 10x10mm (AR), LQFP44 10x10mm (J), LQFP32 7x7mm (K)  
Rev. 5  
1/263  
September 2006  
1

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