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ST16C554DCJ68-F PDF预览

ST16C554DCJ68-F

更新时间: 2024-11-22 12:56:19
品牌 Logo 应用领域
艾科嘉 - EXAR 微控制器和处理器串行IO控制器通信控制器外围集成电路先进先出芯片数据传输时钟
页数 文件大小 规格书
39页 761K
描述
2.97V TO 5.5V QUAD UART WITH 16-BYTE FIFO

ST16C554DCJ68-F 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Transferred零件包装代码:LCC
包装说明:QCCJ, LDCC68,1.0SQ针数:68
Reach Compliance Code:compliantECCN代码:5A991
HTS代码:8542.31.00.01风险等级:4.27
Is Samacsys:N其他特性:ALSO OPERATES AT 3.3V SUPPLY
地址总线宽度:3边界扫描:NO
最大时钟频率:24 MHz通信协议:ASYNC, BIT
数据编码/解码方法:NRZ最大数据传输速率:0.1875 MBps
外部数据总线宽度:8JESD-30 代码:S-PQCC-J68
JESD-609代码:e3长度:24.23 mm
低功率模式:NODMA 通道数量:1
I/O 线路数量:串行 I/O 数:4
端子数量:68片上数据RAM宽度:
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC68,1.0SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):245
电源:3.3/5 V认证状态:Not Qualified
RAM(字数):0座面最大高度:5.08 mm
子类别:Serial IO/Communication Controllers最大压摆率:5 mA
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:24.23 mm
uPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIALBase Number Matches:1

ST16C554DCJ68-F 数据手册

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ST16C554/554D  
2.97V TO 5.5V QUAD UART WITH 16-BYTE FIFO  
JUNE 2006  
REV. 4.0.1  
FEATURES  
GENERAL DESCRIPTION  
Pin-to-pin compatible with the industry standard  
The ST16C554/554D (554) is a quad Universal  
Asynchronous Receiver and Transmitter (UART) with  
16 bytes of transmit and receive FIFOs, selectable  
receive FIFO trigger levels and data rates of up to 1.5  
Mbps. Each UART has a set of registers that provide  
the user with operating status and control, receiver  
error indications, and modem serial interface  
controls. An internal loopback capability allows  
onboard diagnostics. The 554 is available in a 64-pin  
LQFP and a 68-pin PLCC package. The 64-pin  
package only offers the 16 mode interface, but the  
68-pin package offers an additional 68 mode  
interface which allows easy integration with Motorola  
processors. The ST16C554CQ64 (64-pin) offers  
ST16C454,  
ST68C454,  
ST68C554,  
TI’s  
TL16C554A and Philips’ SC16C554B  
Intel or Motorola Data Bus Interface select  
Four independent UART channels  
Register Set Compatible to 16C550  
Data rates of up to 1.5 Mbps at 5 V  
Data rates of up to 500 Kbps at 3.3V  
16 byte Transmit FIFO  
16 byte Receive FIFO with error tags  
4 Selectable RX FIFO Trigger Levels  
Full modem interface  
three  
state  
interrupt  
output  
while  
the  
ST16C554DCQ64 provides continuous interrupt  
output. The 554 combines the package interface  
modes of the 16C554 and 68C554 on a single  
integrated chip.  
2.97V to 5.5V supply operation  
Crystal oscillator or external clock input  
APPLICATIONS  
Portable Appliances  
Telecommunication Network Routers  
Ethernet Network Routers  
Cellular Data Devices  
Factory Automation and Process Controls  
FIGURE 1. ST16C554 BLOCK DIAGRAM  
2.97 V to 5.5 V VCC  
GND  
A2:A0  
D7:D0  
UART Channel A  
16 Byte TX FIFO  
IOR#  
IOW#  
UART  
Regs  
TXA, RXA, IRTXA, DTRA#,  
DSRA#, RTSA#, CTSA#,  
CDA#, RIA#  
IR  
ENDEC  
TX &RX  
CSA#  
CSB#  
BRG  
16 Byte RX FIFO  
CSC#  
CSD#  
INTA  
TXB, RXB, IRTXB, DTRB#,  
DSRB#, RTSB#, CTSB#,  
CDB#, RIB#  
UART Channel B  
(same as Channel A)  
Data Bus  
Interface  
INTB  
INTC  
TXC, RXC, IRTXC, DTRC#,  
DSRC#, RTSC#, CTSC#,  
CDC#, RIC#  
UART Channel C  
(same as Channel A)  
INTD  
TXRDY#A-D  
RXRDY#A-D  
Reset  
TXD, RXD, IRTXD, DTRD#,  
DSRD#, RTSD#, CTSD#,  
CDD#, RID#  
UART Channel D  
(same as Channel A)  
16 68#  
/
XTAL1  
XTAL2  
Crystal Osc Buffer  
/
INTSEL  
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com  

ST16C554DCJ68-F 替代型号

型号 品牌 替代类型 描述 数据表
ST16C554DCJ68TR-F EXAR

完全替代

Serial I/O Controller, PQCC68,
ST16C554DIJ68-F EXAR

类似代替

Serial I/O Controller, 4 Channel(s), 0.1875MBps, CMOS, PQCC68, GREEN, PLASTIC, LCC-68
ST16C554DIJ68TR-F EXAR

类似代替

Serial I/O Controller, 4 Channel(s), 0.1875MBps, CMOS, PQCC68, PLASTIC, LCC-68

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Serial I/O Controller, PQFP64