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ST16C554DCQ64TR-F PDF预览

ST16C554DCQ64TR-F

更新时间: 2024-01-15 00:14:33
品牌 Logo 应用领域
艾科嘉 - EXAR 外围集成电路
页数 文件大小 规格书
39页 316K
描述
Serial I/O Controller, PQFP64,

ST16C554DCQ64TR-F 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:QFP, QFP64,.47SQ,20Reach Compliance Code:compliant
风险等级:5.7JESD-30 代码:S-PQFP-G64
JESD-609代码:e3端子数量:64
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP64,.47SQ,20封装形状:SQUARE
封装形式:FLATPACK电源:3.3/5 V
认证状态:Not Qualified子类别:Serial IO/Communication Controllers
表面贴装:YES温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
uPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIALBase Number Matches:1

ST16C554DCQ64TR-F 数据手册

 浏览型号ST16C554DCQ64TR-F的Datasheet PDF文件第2页浏览型号ST16C554DCQ64TR-F的Datasheet PDF文件第3页浏览型号ST16C554DCQ64TR-F的Datasheet PDF文件第4页浏览型号ST16C554DCQ64TR-F的Datasheet PDF文件第5页浏览型号ST16C554DCQ64TR-F的Datasheet PDF文件第6页浏览型号ST16C554DCQ64TR-F的Datasheet PDF文件第7页 
ST16C554/554D  
2.97V TO 5.5V QUAD UART WITH 16-BYTE FIFO  
JUNE 2006  
REV. 4.0.1  
FEATURES  
GENERAL DESCRIPTION  
Pin-to-pin compatible with the industry standard  
The ST16C554/554D (554) is a quad Universal  
Asynchronous Receiver and Transmitter (UART) with  
16 bytes of transmit and receive FIFOs, selectable  
receive FIFO trigger levels and data rates of up to 1.5  
Mbps. Each UART has a set of registers that provide  
the user with operating status and control, receiver  
error indications, and modem serial interface  
controls. An internal loopback capability allows  
onboard diagnostics. The 554 is available in a 64-pin  
LQFP and a 68-pin PLCC package. The 64-pin  
package only offers the 16 mode interface, but the  
68-pin package offers an additional 68 mode  
interface which allows easy integration with Motorola  
processors. The ST16C554CQ64 (64-pin) offers  
ST16C454,  
ST68C454,  
ST68C554,  
TI’s  
TL16C554A and Philips’ SC16C554B  
Intel or Motorola Data Bus Interface select  
Four independent UART channels  
Register Set Compatible to 16C550  
Data rates of up to 1.5 Mbps at 5 V  
Data rates of up to 500 Kbps at 3.3V  
16 byte Transmit FIFO  
16 byte Receive FIFO with error tags  
4 Selectable RX FIFO Trigger Levels  
Full modem interface  
three  
state  
interrupt  
output  
while  
the  
ST16C554DCQ64 provides continuous interrupt  
output. The 554 combines the package interface  
modes of the 16C554 and 68C554 on a single  
integrated chip.  
2.97V to 5.5V supply operation  
Crystal oscillator or external clock input  
APPLICATIONS  
Portable Appliances  
Telecommunication Network Routers  
Ethernet Network Routers  
Cellular Data Devices  
Factory Automation and Process Controls  
FIGURE 1. ST16C554 BLOCK DIAGRAM  
2.97 V to 5.5 V VCC  
GND  
A2:A0  
D7:D0  
UART Channel A  
16 Byte TX FIFO  
IOR#  
IOW#  
UART  
Regs  
TXA, RXA, IRTXA, DTRA#,  
DSRA#, RTSA#, CTSA#,  
CDA#, RIA#  
IR  
ENDEC  
TX &RX  
CSA#  
CSB#  
BRG  
16 Byte RX FIFO  
CSC#  
CSD#  
INTA  
TXB, RXB, IRTXB, DTRB#,  
DSRB#, RTSB#, CTSB#,  
CDB#, RIB#  
UART Channel B  
(same as Channel A)  
Data Bus  
Interface  
INTB  
INTC  
TXC, RXC, IRTXC, DTRC#,  
DSRC#, RTSC#, CTSC#,  
CDC#, RIC#  
UART Channel C  
(same as Channel A)  
INTD  
TXRDY#A-D  
RXRDY#A-D  
Reset  
TXD, RXD, IRTXD, DTRD#,  
DSRD#, RTSD#, CTSD#,  
CDD#, RID#  
UART Channel D  
(same as Channel A)  
16 68#  
/
XTAL1  
XTAL2  
Crystal Osc Buffer  
/
INTSEL  
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com  
 
 
 
 

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