FlashFlex MCU
SST89C58RC
SST89E/VE5xC FlashFlex51 MCU
Data Sheet
FEATURES:
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8-bit 8051-Compatible Microcontroller (MCU)
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Brown-out Reset (BOR)
Nine Interrupt Sources at 4 Priority Levels
Three 16-bit Timers/Counters
Programmable Watchdog Timer (WDT)
Second DPTR register
Four 8-bit I/O Ports (32 I/O pins)
I/O pins can tolerate VDD +0.5V (Pulled up and
driven to 5.5V)
Standard 12 Clocks per cycle, the device has an
option to double the speed to 6 clocks per cycle
– Speeds up to 40 MHz with 12 clock cycles per
machine cycle
– Speeds up to 20 MHz with 6 clock cycles per
machine cycle - equivalent to 40 MHz
with Embedded SuperFlash Memory
– Fully Software Compatible
– Development Toolset Compatible
– Pin-for-Pin Package Compatible
SST89C58RC Operation
– 0 to 40 MHz at 2.7-5.5V
34 KByte Single Block SuperFlash EEPROM
with two partitions
– 32 KByte primary partition + 2 KByte secondary
partition
– Flash Block is divided into four application
pages (8 KByte) and one loader page (2 KByte)
– Individual Page Security Lock
– Address up to 64KB for External Data Memory
– In-System Programming (ISP)
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Enhanced Hook Emulation
Low Power Modes
– Power-down Mode with External Interrupt Wake-up
– Idle Mode
– In-Application Programming (IAP)
– Small-Sector Architecture: 128-Byte Sector Size
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Total 1KByte On-chip RAM
Supports External Address Range up to 64
KByte of Program and Data Memory
Dual Enhanced SMBus
– Up to 400 Kbit per second
Full-Duplex, Enhanced UART
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Temperature Ranges:
– Industrial (-40°C to +85°C)
– Commercial (0°C to +70°C)
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Packages Available
– 44-lead PLCC
– 44-lead TQFP
– 40-contact WQFN
– Framing error detection
– Automatic address recognition
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All non-Pb (lead-free) devices are RoHS compliant
PRODUCT DESCRIPTION
The SST89C58RC is a member of the FlashFlex family of
8-bit micro controllers designed and manufactured with
SST patented and proprietary SuperFlash CMOS semi-
conductor process technology. The split-gate cell design
and thick-oxide tunneling injector offer significant cost and
reliability benefits for customers. It uses the 8051 instruc-
tion set and is pin-for-pin compatible with standard 8051
micro controller devices.
cuit board for maximum flexibility. It is pre-programmed with
an example of the bootstrap loader in memory, demonstrat-
ing initial user program code loading or subsequent user
code updating via an ISP operation. The sample bootstrap
loader is for the user’s reference only, and SST does not
guarantee its functionality. Chip-Erase operations will erase
the pre-programmed sample code.
In addition to 34 KByte of SuperFlash EEPROM on-chip
program memory and 1024 x8 bits of on-chip RAM, the
device can address up to 64 KByte of external program
memory and up to 64 KByte of external RAM.
With two enhanced SMBus interfaces, the SST89C58RC
supports speeds up to 400 Kbps. It comes with 34 KByte of
on-chip flash EEPROM program memory which is divided
into two independent program memory partitions. The pri-
mary partition occupies 32 KByte of internal program mem-
ory space and the secondary partition occupies 2 KByte of
internal program memory space.
The highly-reliable, patented SST SuperFlash technology
and memory cell architecture offer a number of important
advantages for designing and manufacturing flash
EEPROMs. These advantages translate into significant
cost and reliability benefits for customers.
The flash memory can be programmed via a standard
87C5x OTP EPROM programmer fitted with a special
adapter and firmware for SST devices. The SST89C58RC
is designed to be programmed in-system on the printed cir-
©2008 Silicon Storage Technology, Inc.
The SST logo, SuperFlash, and FlashFlex are registered trademarks of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.
S71323-05-000
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12/08