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SST89C58RC-40-I-QIF PDF预览

SST89C58RC-40-I-QIF

更新时间： 2024-11-25 19:46:19
品牌 Logo 应用领域
美国微芯 - MICROCHIP 时钟外围集成电路
页数 文件大小 规格书
77页 1494K
描述
8-BIT, FLASH, 40 MHz, MICROCONTROLLER, QCC40, ROHS COMPLIANT, MO-220IWJJD-5, WQFN-40

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SST89C58RC-40-I-QIF 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFN
包装说明：HVQCCN,针数：40
Reach Compliance Code：compliantECCN代码：3A991.A.2
HTS代码：8542.31.00.01风险等级：5.48
具有ADC：NO地址总线宽度：16
位大小：8最大时钟频率：40 MHz
DAC 通道：NODMA 通道：NO
外部数据总线宽度：8JESD-30 代码：S-XQCC-N40
长度：6 mmI/O 线路数量：32
端子数量：40最高工作温度：85 °C
最低工作温度：-40 °CPWM 通道：NO
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260认证状态：Not Qualified
ROM可编程性：FLASH座面最大高度：0.8 mm
速度：40 MHz最大供电电压：5.5 V
最小供电电压：2.7 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：6 mm
uPs/uCs/外围集成电路类型：MICROCONTROLLERBase Number Matches：1

SST89C58RC-40-I-QIF 数据手册

 浏览型号SST89C58RC-40-I-QIF的Datasheet PDF文件第2页浏览型号SST89C58RC-40-I-QIF的Datasheet PDF文件第3页浏览型号SST89C58RC-40-I-QIF的Datasheet PDF文件第4页浏览型号SST89C58RC-40-I-QIF的Datasheet PDF文件第5页浏览型号SST89C58RC-40-I-QIF的Datasheet PDF文件第6页浏览型号SST89C58RC-40-I-QIF的Datasheet PDF文件第7页 
FlashFlex MCU  
SST89C58RC  
SST89E/VE5xC FlashFlex51 MCU  
Preliminary Specification  
FEATURES:  
•
8-bit 8051-Compatible Microcontroller (MCU)  
•
•
•
•
•
•
•
Brown-out Reset (BOR)  
Nine Interrupt Sources at 4 Priority Levels  
Three 16-bit Timers/Counters  
Programmable Watchdog Timer (WDT)  
Second DPTR register  
Four 8-bit I/O Ports (32 I/O pins)  
I/O pins are 5V tolerant (Pulled up and  
driven to 5.5V)  
Standard 12 Clocks per cycle, the device has an  
option to double the speed to 6 clocks per cycle  
– Speeds up to 40 MHz with 12 clock cycles per  
machine cycle  
– Speeds up to 20 MHz with 6 clock cycles per  
machine cycle - equivalent to 40 MHz  
with Embedded SuperFlash Memory  
– Fully Software Compatible  
– Development Toolset Compatible  
– Pin-for-Pin Package Compatible  
SST89C58RC Operation  
– 0 to 40 MHz at 2.7-5.5V  
34 KByte Single Block SuperFlash EEPROM  
with two partitions  
– 32 KByte primary partition + 2 KByte secondary  
partition  
– Flash Block is divided into four application  
pages (8 KByte) and one loader page (2 KByte)  
– Individual Page Security Lock  
– Address up to 64KB for External Data Memory  
– In-System Programming (ISP)  
•
•
•
•
•
Enhanced Hook Emulation  
Low Power Modes  
– Power-down Mode with External Interrupt Wake-up  
– Idle Mode  
– In-Application Programming (IAP)  
– Small-Sector Architecture: 128-Byte Sector Size  
•
•
Total 1KByte On-chip RAM  
Supports External Address Range up to 64  
KByte of Program and Data Memory  
Dual Enhanced SMBus  
– Up to 400 Kbit per second  
Full-Duplex, Enhanced UART  
•
•
Temperature Ranges:  
– Industrial (-40°C to +85°C)  
Packages Available  
– 44-lead PLCC  
– 44-lead TQFP  
– 40-contact WQFN  
•
•
– Framing error detection  
– Automatic address recognition  
•
All non-Pb (lead-free) devices are RoHS compliant  
PRODUCT DESCRIPTION  
The SST89C58RC is a member of the FlashFlex family of  
8-bit micro controllers designed and manufactured with  
SST patented and proprietary SuperFlash CMOS semi-  
conductor process technology. The split-gate cell design  
and thick-oxide tunneling injector offer significant cost and  
reliability benefits for customers. It uses the 8051 instruc-  
tion set and is pin-for-pin compatible with standard 8051  
micro controller devices.  
cuit board for maximum flexibility. It is pre-programmed with  
an example of the bootstrap loader in memory, demonstrat-  
ing initial user program code loading or subsequent user  
code updating via an ISP operation. The sample bootstrap  
loader is for the user’s reference only, and SST does not  
guarantee its functionality. Chip-Erase operations will erase  
the pre-programmed sample code.  
In addition to 34 KByte of SuperFlash EEPROM on-chip  
program memory and 1024 x8 bits of on-chip RAM, the  
device can address up to 64 KByte of external program  
memory and up to 64 KByte of external RAM.  
With two enhanced SMBus interfaces, the SST89C58RC  
supports speeds up to 400 Kbps. It comes with 34 KByte of  
on-chip flash EEPROM program memory which is divided  
into two independent program memory partitions. The pri-  
mary partition occupies 32 KByte of internal program mem-  
ory space and the secondary partition occupies 2 KByte of  
internal program memory space.  
The highly-reliable, patented SST SuperFlash technology  
and memory cell architecture offer a number of important  
advantages for designing and manufacturing flash  
EEPROMs. These advantages translate into significant  
cost and reliability benefits for customers.  
The flash memory can be programmed via a standard  
87C5x OTP EPROM programmer fitted with a special  
adapter and firmware for SST devices. The SST89C58RC  
is designed to be programmed in-system on the printed cir-  
©2008 Silicon Storage Technology, Inc.  
The SST logo, SuperFlash, and FlashFlex are registered trademarks of Silicon Storage Technology, Inc.  
These specifications are subject to change without notice.  
S71323-03-000  
1
07/08  
1234567...77

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