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SST29LE512-150-4C-NHE PDF预览

SST29LE512-150-4C-NHE

更新时间： 2024-11-10 15:52:55
品牌 Logo 应用领域
芯科 - SILICON 内存集成电路
页数 文件大小 规格书
26页 771K
描述
Flash, 64KX8, 150ns, PQCC32, PLASTIC, MS-016AE, LCC-32

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SST29LE512-150-4C-NHE 技术参数

是否Rohs认证：符合生命周期：Obsolete
零件包装代码：QFJ包装说明：QCCJ,
针数：32Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.32.00.51
风险等级：5.84Is Samacsys：N
最长访问时间：150 nsJESD-30 代码：R-PQCC-J32
JESD-609代码：e3长度：13.97 mm
内存密度：524288 bit内存集成电路类型：FLASH
内存宽度：8功能数量：1
端子数量：32字数：65536 words
字数代码：64000工作模式：ASYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：64KX8封装主体材料：PLASTIC/EPOXY
封装代码：QCCJ封装形状：RECTANGULAR
封装形式：CHIP CARRIER并行/串行：PARALLEL
峰值回流温度（摄氏度）：260编程电压：3 V
认证状态：Not Qualified座面最大高度：3.556 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Matte Tin (Sn)端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
处于峰值回流温度下的最长时间：10宽度：11.43 mm
最长写入周期时间 (tWC)：10 msBase Number Matches：1

SST29LE512-150-4C-NHE 数据手册

 浏览型号SST29LE512-150-4C-NHE的Datasheet PDF文件第2页浏览型号SST29LE512-150-4C-NHE的Datasheet PDF文件第3页浏览型号SST29LE512-150-4C-NHE的Datasheet PDF文件第4页浏览型号SST29LE512-150-4C-NHE的Datasheet PDF文件第5页浏览型号SST29LE512-150-4C-NHE的Datasheet PDF文件第6页浏览型号SST29LE512-150-4C-NHE的Datasheet PDF文件第7页 
512 Kbit (64K x8) Page-Write EEPROM  
SST29EE512 / SST29LE512 / SST29VE512  
SST29EE / LE / VE512512Kb Page-Write flash memories  
Data Sheet  
FEATURES:  
•
Single Voltage Read and Write Operations  
•
•
Latched Address and Data  
– 4.5-5.5V for SST29EE512  
– 3.0-3.6V for SST29LE512  
– 2.7-3.6V for SST29VE512  
Superior Reliability  
– Endurance: 100,000 Cycles (typical)  
– Greater than 100 years Data Retention  
Low Power Consumption  
– Active Current: 20 mA (typical) for 5V and 10 mA  
(typical) for 3.0/2.7V  
– Standby Current: 10 µA (typical)  
Fast Page-Write Operation  
Automatic Write Timing  
– Internal VPP Generation  
End of Write Detection  
– Toggle Bit  
– Data# Polling  
•
•
•
•
•
Hardware and Software Data Protection  
Product Identification can be accessed via  
Software Operation  
TTL I/O Compatibility  
JEDEC Standard  
– Flash EEPROM Pinouts and command sets  
Packages Available  
– 32-lead PLCC  
– 32-lead TSOP (8mm x 14mm, 8mm x 20mm)  
– 32-pin PDIP  
•
•
•
•
– 128 Bytes per Page, 512 Pages  
– Page-Write Cycle: 5 ms (typical)  
– Complete Memory Rewrite: 2.5 sec (typical)  
– Effective Byte-Write Cycle Time: 39 µs (typical)  
•
Fast Read Access Time  
– 4.5-5.5V operation: 70 and 90 ns  
– 3.0-3.6V operation: 150 and 200 ns  
– 2.7-3.6V operation: 200 and 250 ns  
PRODUCT DESCRIPTION  
The SST29EE/LE/VE512 are 64K x8 CMOS, Page-Write  
EEPROMs manufactured with SST’s proprietary, high  
performance CMOS SuperFlash technology. The split-  
gate cell design and thick oxide tunneling injector attain  
better reliability and manufacturability compared with  
alternate approaches. The SST29EE/LE/VE512 write  
with a single power supply. Internal Erase/Program is  
transparent to the user. The SST29EE/LE/VE512 con-  
form to JEDEC standard pinouts for byte-wide memories.  
The SST29EE/LE/VE512 are suited for applications that  
require convenient and economical updating of program,  
configuration, or data memory. For all system applica-  
tions, the SST29EE/LE/VE512 significantly improve per-  
formance and reliability, while lowering power  
consumption. The SST29EE/LE/VE512 improve flexibil-  
ity while lowering the cost for program, data, and configu-  
ration storage applications.  
To meet high density, surface mount requirements, the  
SST29EE/LE/VE512 are offered in 32-lead PLCC and 32-  
lead TSOP packages. A 600-mil, 32-pin PDIP package is  
also available. See Figures 1, 2, and 3 for pinouts.  
Featuring high performance Page-Write, the SST29EE/  
LE/VE512 provide a typical Byte-Write time of 39 µsec.  
The entire memory, i.e., 64 Kbyte, can be written page-  
by-page in as little as 2.5 seconds, when using interface  
features such as Toggle Bit or Data# Polling to indicate  
the completion of a Write cycle. To protect against inad-  
vertent write, the SST29EE/LE/VE512 have on-chip  
hardware and Software Data Protection schemes.  
Designed, manufactured, and tested for a wide spectrum  
of applications, the SST29EE/LE/VE512 are offered with  
a guaranteed Page-Write endurance of 10,000 cycles.  
Data retention is rated at greater than 100 years.  
Device Operation  
The SST Page-Write EEPROM offers in-circuit electrical  
write capability. The SST29EE/LE/VE512 do not require  
separate Erase and Program operations. The internally  
timed Write cycle executes both erase and program trans-  
parently to the user. The SST29EE/LE/VE512 have indus-  
try standard optional Software Data Protection, which SST  
recommends always to be enabled. The SST29EE/LE/  
VE512 are compatible with industry standard EEPROM  
pinouts and functionality.  
©2002 Silicon Storage Technology, Inc.  
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.  
Small-Sector Flash and SSF are trademarks of Silicon Storage Technology, Inc.  
These specifications are subject to change without notice.  
S71060-06-000 2/02  
1
301  
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