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SST29EE512-250-4I-UH PDF预览

SST29EE512-250-4I-UH

更新时间: 2024-11-07 22:42:43
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SST 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
26页 324K
描述
512 Kbit (64K x8) Page-Mode EEPROM

SST29EE512-250-4I-UH 数据手册

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512 Kbit (64K x8) Page-Mode EEPROM  
SST29EE512 / SST29LE512 / SST29VE512  
SST29EE512 / SST29LE512 / SST29VE512512Kb Page-Mode flash memories  
Data Sheet  
FEATURES:  
Single Voltage Read and Write Operations  
Latched Address and Data  
– 5.0V-only for SST29EE512  
– 3.0-3.6V for SST29LE512  
– 2.7-3.6V for SST29VE512  
Automatic Write Timing  
Internal VPP Generation  
End of Write Detection  
Superior Reliability  
Toggle Bit  
Data# Polling  
Endurance: 100,000 Cycles (typical)  
Greater than 100 years Data Retention  
Hardware and Software Data Protection  
Low Power Consumption  
Product Identification can be accessed via  
Software Operation  
Active Current: 20 mA (typical) for 5V and 10 mA  
(typical) for 3.0/2.7V  
Standby Current: 10 µA (typical)  
TTL I/O Compatibility  
JEDEC Standard  
Fast Page-Write Operation  
Flash EEPROM Pinouts and command sets  
Packages Available  
128 Bytes per Page, 512 Pages  
Page-Write Cycle: 5 ms (typical)  
Complete Memory Rewrite: 2.5 sec (typical)  
Effective Byte-Write Cycle Time: 39 µs (typical)  
32-lead PLCC  
32-lead TSOP (8mm x 14mm, 8mm x 20mm)  
32-pin PDIP  
Fast Read Access Time  
5.0V-only operation: 70 and 90 ns  
3.0-3.6V operation: 150 and 200 ns  
2.7-3.6V operation: 200 and 250 ns  
PRODUCT DESCRIPTION  
The SST29EE/LE/VE512 are 64K x8 CMOS, Page-Write  
EEPROMs manufactured with SSTs proprietary, high  
performance CMOS SuperFlash technology. The split-  
gate cell design and thick oxide tunneling injector attain  
better reliability and manufacturability compared with  
alternate approaches. The SST29EE/LE/VE512 write  
with a single power supply. Internal Erase/Program is  
transparent to the user. The SST29EE/LE/VE512 con-  
form to JEDEC standard pinouts for byte-wide memories.  
The SST29EE/LE/VE512 are suited for applications that  
require convenient and economical updating of program,  
configuration, or data memory. For all system applica-  
tions, the SST29EE/LE/VE512 significantly improve per-  
formance and reliability, while lowering power  
consumption. The SST29EE/LE/VE512 improve flexibil-  
ity while lowering the cost for program, data, and configu-  
ration storage applications.  
To meet high density, surface mount requirements, the  
SST29EE/LE/VE512 are offered in 32-lead PLCC and 32-  
lead TSOP packages. A 600-mil, 32-pin PDIP package is  
also available. See Figures 1, 2, and 3 for pinouts.  
Featuring high performance Page-Write, the SST29EE/  
LE/VE512 provide a typical Byte-Write time of 39 µsec.  
The entire memory, i.e., 64 KBytes, can be written page-  
by-page in as little as 2.5 seconds, when using interface  
features such as Toggle Bit or Data# Polling to indicate  
the completion of a Write cycle. To protect against inad-  
vertent write, the SST29EE/LE/VE512 have on-chip  
hardware and Software Data Protection schemes.  
Designed, manufactured, and tested for a wide spectrum  
of applications, the SST29EE/LE/VE512 are offered with  
a guaranteed Page-Write endurance of 10,000 cycles.  
Data retention is rated at greater than 100 years.  
Device Operation  
The SST Page-Mode EEPROM offers in-circuit electrical  
write capability. The SST29EE/LE/VE512 do not require  
separate Erase and Program operations. The internally  
timed Write cycle executes both erase and program trans-  
parently to the user. The SST29EE/LE/VE512 have indus-  
try standard optional Software Data Protection, which SST  
recommends always to be enabled. The SST29EE/LE/  
VE512 are compatible with industry standard EEPROM  
pinouts and functionality.  
©2001 Silicon Storage Technology, Inc.  
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.  
SSF is a trademark of Silicon Storage Technology, Inc.  
S71060-06-000 6/01  
1
301  
These specifications are subject to change without notice.  

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