1 Megabit (128K x 8) Page Mode EEPROM
SST29EE010, SST29LE010, SST29VE010
Data Sheet
FEATURES:
•
Single Voltage Read and Write Operations
•
Fast Read Access Time
1
– 5.0V-only for the 29EE010
– 3.0V-only for the 29LE010
– 2.7V-only for the 29VE010
– 5.0V-only operation: 90 and 120 ns
– 3.0V-only operation: 150 and 200 ns
– 2.7V-only operation: 200 and 250 ns
•
•
Superior Reliability
•
•
Latched Address and Data
2
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
Automatic Write Timing
– Internal Vpp Generation
End of Write Detection
3
Low Power Consumption
•
– Active Current: 20 mA (typical) for 5V and
10 mA (typical) for 3.0/2.7V
– Standby Current: 10 µA (typical)
– Toggle Bit
– Data# Polling
4
•
•
•
•
Hardware and Software Data Protection
•
Fast Page-Write Operation
TTL I/O Compatibility
– 128 Bytes per Page, 1024 Pages
– Page-Write Cycle: 5 ms (typical)
– Complete Memory Rewrite: 5 sec (typical)
– Effective Byte-write Cycle Time: 39 µs
(typical)
5
JEDEC Standard Byte-wide EEPROM Pinouts
Packages Available
6
– 32-Pin TSOP (8x20 & 8x14 mm)
– 32-Lead PLCC
– 32 Pin Plastic DIP
7
applications, the 29EE010/29LE010/29VE010 signifi-
cantly improve performance and reliability, while lower-
ingpowerconsumption,whencomparedwithfloppydisk
or EPROM approaches. The 29EE010/29LE010/
29VE010 improve flexibility while lowering the cost for
program, data, and configuration storage applications.
PRODUCT DESCRIPTION
8
The 29EE010/29LE010/29VE010 are 128K x 8 CMOS
pagemodeEEPROMsmanufacturedwithSST’spropri-
etary, highperformanceCMOSSuperFlashtechnology.
The split gate cell design and thick oxide tunneling
injector attain better reliability and manufacturability
compared with alternate approaches. The 29EE010/
29LE010/29VE010 write with a single power supply.
Internal Erase/Program is transparent to the user. The
29EE010/29LE010/29VE010 conform to JEDEC stan-
dard pinouts for byte-wide memories.
9
To meet high density, surface mount requirements, the
29EE010/29LE010/29VE010 are offered in 32-pin
TSOP and 32-lead PLCC packages. A 600-mil, 32-pin
PDIP package is also available. See Figures 1 and 2 for
pinouts.
10
11
12
13
14
15
16
Device Operation
Featuring high performance page write, the 29EE010/
29LE010/29VE010 provide a typical byte-write time of
39 µsec. The entire memory, i.e., 128K bytes, can be
writtenpagebypageinaslittleas5seconds,whenusing
interface features such as Toggle Bit or Data# Polling to
indicate the completion of a write cycle. To protect
against inadvertent write, the 29EE010/29LE010/
29VE010 have on-chip hardware and software data
protection schemes. Designed, manufactured, and
testedforawidespectrumofapplications,the29EE010/
29LE010/29VE010 are offered with a guaranteed page-
write endurance of 104 or 103 cycles. Data retention is
rated at greater than 100 years.
TheSSTpagemodeEEPROMoffersin-circuitelectrical
write capability. The 29EE010/29LE010/29VE010 does
notrequireseparateeraseandprogramoperations.The
internally timed write cycle executes both erase and
program transparently to the user. The 29EE010/
29LE010/29VE010 have industry standard optional
Software Data Protection, which SST recommends al-
ways to be enabled. The 29EE010/29LE010/29VE010
arecompatiblewithindustrystandardEEPROMpinouts
and functionality.
Read
The Read operations of the 29EE010/29LE010/
29VE010 are controlled by CE# and OE#, both have to
be low for the system to obtain data from the outputs.
CE# is used for device selection. When CE# is high, the
The29EE010/29LE010/29VE010aresuitedforapplica-
tionsthatrequireconvenientandeconomicalupdatingof
program, configuration, or data memory. For all system
3©0149-0948 S1i2li/c9o7n Storage Technology, Inc. The SST logo and SuperFlash are registered trademar1ks of Silicon Storage Technology, Inc. These specifications are subject to change without notice.
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