PF827-03
SRM2B256SLMX55/70/10
256K-Bit Static RAM
● Wide Temperature Range
● Extremely Low Standby Current
● Access Time 100ns (2.7V) /55ns (4.5V)
● 32,768 Words✕8-bit Asynchronous
■ DESCRIPTION
The SRM2B256SLMX is a low voltage operating 32,768 words✕8-bit asynchronous, static, random access
memory fabricated using an advanced CMOS technology. Its very low standby power consumption makes it
ideal for applications requiring non-volatile storage with back-up batteries. And –25 to 85°C operating temperature
range makes it ideal for industrial use. The asynchronous and static nature of the memory requires no external
clock or refresh circuit. Output ports are 3-state output allows easy
expansion of memory capacity. These features makes the
■ PIN CONFIGURATION
SRM2B256SLMX usable for wide range of applications from
(DIP/SOP2)
28 VDD
27 WE
26 A13
25 A8
24 A9
23 A11
22 OE
21 A10
20 CS
19 I/O8
18 I/O7
17 I/O6
16 I/O5
15 I/O4
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1 11
I/O2 12
I/O3 13
VSS 14
1
2
3
4
5
6
7
8
microprocesser systems to terminal devices.
■ FEATURES
● Wide temperature range ................... –25 to 85°C
● Extended supply voltage range ......... 2.7 to 5.5V
● Fast access time ............................... 100ns (3V±10%)
55ns (5V±10%)
9
10
● Extremely low standby current .......... SL Version
● Completely static ............................... no clock required
● 3-state output
(TSOP)
OE
● Battery back-up operation
22
21 A10
20 CS
● Package .............. SRM2B256SLCX
DIP2-28pin (plastic)
SOP2-28pin (plastic)
A11 23
A9
A8
24
25
19 I/O8
18 I/O7
17 I/O6
16 I/O5
15 I/O4
14 VSS
13 I/O3
12 I/O2
11 I/O1
10 A0
SRM2B256SLMX
A13 26
WE
VDD
A14
A12
A7
27
28
1
2
3
SRM2B256SLTMX TSOP (I)-28pin (plastic)
SRM2B256SLRMX TSOP (I)-28pin-R1 (plastic)
SRM2B256SLTMX
A6
A5
A4
4
5
6
■ BLOCK DIAGRAM
9
8
A1
A2
A3
7
A0
A1
A2
(TSOP-R1)(Reverse bending)
A3
A4
A5
7
6
5
8
9
A2
A1
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
9
512
Memory Cell Array
10 A0
512✕64✕8
A6
4
11 I/O1
12 I/O2
13 I/O3
14
15
16 I/O5
17 I/O6
18 I/O7
19 I/O8
20 CS
A7
3
A12
A14
VDD
WE
2
1
28
27
VSS
I/O4
SRM2B256SLRMX
64✕8
A13 26
A8
A9
25
24
Column Gate
6
64
A11 23
OE 22
21 A10
CS
8
■ PIN DESCRIPTION
A0 to A14 Address Input
WE
OE
CS
Write Enable
Output Enable
Chip Select
OE
I/O Buffer
WE
I/O1 to I/O8 Data Input/Output
VDD
VSS
Power Supply (2.7 to 5.5V)
Power Supply (0V)
I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8