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SPC564L60x PDF预览

SPC564L60x

更新时间: 2024-10-29 01:09:51
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意法半导体 - STMICROELECTRONICS /
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165页 2992K
描述
Dual issue five-stage pipeline core

SPC564L60x 数据手册

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SPC56EL60x, SPC56EL54x,  
SPC564L60x, SPC564L54x  
32-bit Power Architecture® microcontroller for automotive  
SIL3/ASILD chassis and safety applications  
Datasheet - production data  
– Replicated junction temperature sensor  
– Non-maskable interrupt (NMI)  
– 16-region memory protection unit (MPU)  
LQFP100 (14 x 14x 1.4 mm)  
– Clock monitoring units (CMU)  
LQFP144 (20 x 20 x 1.4 mm)  
– Power management unit (PMU)  
– Cyclic redundancy check (CRC) unit  
Decoupled Parallel mode for high-performance  
LFBGA257 (14 x 14 mm)  
use of replicated cores  
Nexus Class 3+ interface  
Features  
Interrupts  
High-performance e200z4d dual core  
32-bit Power Architecture® technology CPU  
Core frequency as high as 120 MHz  
Dual issue five-stage pipeline core  
Variable Length Encoding (VLE)  
– Replicated 16-priority controller  
– Replicated 16-channel eDMA controller  
GPIOs individually programmable as input,  
output or special function  
Three 6-channel general-purpose eTimer units  
2 FlexPWM units  
Memory Management Unit (MMU)  
– Four 16-bit channels per module  
4 KB instruction cache with error detection  
Communications interfaces  
code  
– 2 LINFlexD channels  
Signal processing engine (SPE)  
– 3 DSPI channels with automatic chip select  
generation  
Memory available  
– 1 MB flash memory with ECC  
– 128 KB on-chip SRAM with ECC  
– 2 FlexCAN interfaces (2.0B Active) with 32  
message objects  
– Built-in RWW capabilities for EEPROM  
emulation  
– FlexRay module (V2.1 Rev. A) with 2  
channels, 64 message buffers and data  
rates up to 10 Mbit/s  
SIL3/ASILD innovative safety concept:  
LockStep mode and Fail-safe protection  
Two 12-bit analog-to-digital converters (ADCs)  
– Sphere of replication (SoR) for key  
components (such as CPU core, eDMA,  
crossbar switch)  
– 16 input channels  
– Programmable cross triggering unit (CTU)  
to synchronize ADCs conversion with timer  
and PWM  
– Fault collection and control unit (FCCU)  
– Redundancy control and checker unit  
(RCCU) on outputs of the SoR connected  
to FCCU  
Sine wave generator (D/A with low pass filter)  
On-chip CAN/UART bootstrap loader  
– Boot-time Built-In Self-Test for Memory  
(MBIST) and Logic (LBIST) triggered by  
hardware  
Single 3.0 V to 3.6 V voltage supply  
Ambient temperature range –40 °C to 125 °C  
Junction temperature range –40 °C to 150 °C  
– Boot-time Built-In Self-Test for ADC and  
flash memory triggered by software  
July 2015  
DocID15457 Rev 12  
1/165  
This is information on a product in full production.  
www.st.com  

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