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SNJ54S114W PDF预览

SNJ54S114W

更新时间: 2024-11-04 21:14:15
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 输入元件逻辑集成电路触发器
页数 文件大小 规格书
8页 240K
描述
J-K Flip-Flop, S Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, CDFP14, DFP-14

SNJ54S114W 技术参数

生命周期:Contact Manufacturer包装说明:DFP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.7其他特性:WITH INDIVIDUAL SET INPUTS
系列:SJESD-30 代码:R-CDFP-F14
长度:9.21 mm逻辑集成电路类型:J-K FLIP-FLOP
位数:2功能数量:1
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
传播延迟(tpd):7 ns座面最大高度:2.03 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:MILITARY
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL触发器类型:NEGATIVE EDGE
宽度:6.29 mm最小 fmax:125 MHz
Base Number Matches:1

SNJ54S114W 数据手册

 浏览型号SNJ54S114W的Datasheet PDF文件第2页浏览型号SNJ54S114W的Datasheet PDF文件第3页浏览型号SNJ54S114W的Datasheet PDF文件第4页浏览型号SNJ54S114W的Datasheet PDF文件第5页浏览型号SNJ54S114W的Datasheet PDF文件第6页浏览型号SNJ54S114W的Datasheet PDF文件第7页 
SN54LS114A, SN54S114, SN74LS114A, SN74S114A  
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS  
WITH PRESET, COMMON CLEAR, AND COMMON CLOCK  
SDLS010 – MARCH 1973 – REVISED MARCH 1988  
Copyright 1988, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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