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SNJ54AHC174W PDF预览

SNJ54AHC174W

更新时间： 2024-11-04 05:24:47
品牌 Logo 应用领域
德州仪器 - TI 触发器
页数 文件大小 规格书
18页 584K
描述
HEX D-TYPE FLIP-FLOPS WITH CLEAR

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SNJ54AHC174W 技术参数

生命周期：Obsolete零件包装代码：DFP
包装说明：DFP, FL16,.25针数：16
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.84系列：AHC/VHC/H/U/V
JESD-30 代码：R-GDFP-F16长度：10.16 mm
负载电容（CL）：50 pF逻辑集成电路类型：D FLIP-FLOP
最大频率@ Nom-Sup：80000000 Hz最大I（ol）：0.008 A
位数：6功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：CERAMIC, GLASS-SEALED
封装代码：DFP封装等效代码：FL16,.25
封装形状：RECTANGULAR封装形式：FLATPACK
包装方法：TUBE电源：2/5.5 V
Prop。Delay @ Nom-Sup：10.5 ns传播延迟（tpd）：16.5 ns
认证状态：Not Qualified筛选级别：MIL-PRF-38535
座面最大高度：2.03 mm子类别：FF/Latches
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL触发器类型：POSITIVE EDGE
宽度：6.73 mm最小 fmax：110 MHz

SNJ54AHC174W 数据手册

 浏览型号SNJ54AHC174W的Datasheet PDF文件第2页浏览型号SNJ54AHC174W的Datasheet PDF文件第3页浏览型号SNJ54AHC174W的Datasheet PDF文件第4页浏览型号SNJ54AHC174W的Datasheet PDF文件第5页浏览型号SNJ54AHC174W的Datasheet PDF文件第6页浏览型号SNJ54AHC174W的Datasheet PDF文件第7页 
SN54AHC174, SN74AHC174  
HEX D-TYPE FLIP-FLOPS  
WITH CLEAR  
SCLS425F – JUNE 1998 – REVISED FEBRUARY 2002  
SN54AHC174 . . . J OR W PACKAGE  
SN74AHC174 . . . D, DB, DGV, N, NS, OR PW PACKAGE  
(TOP VIEW)  
Operating Range 2-V to 5.5-V V  
CC  
Contain Six Flip-Flops With Single-Rail  
Outputs  
Applications Include:  
– Buffer/Storage Registers  
– Shift Registers  
CLR  
1Q  
1D  
2D  
2Q  
3D  
3Q  
GND  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
6Q  
6D  
5D  
5Q  
4D  
4Q  
CLK  
– Pattern Generators  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
SN54AHC174 . . . FK PACKAGE  
(TOP VIEW)  
description  
The’AHC174devicesarepositive-edge-triggered  
D-typeflip-flopswithadirectclear(CLR)inputand  
3
2
1
20 19  
18 6D  
are designed for 2-V to 5.5-V V  
operation.  
1D  
2D  
NC  
2Q  
3D  
4
5
6
7
8
CC  
17  
16  
15  
14  
5D  
NC  
5Q  
4D  
Information at the data (D) inputs that meets the  
setup time requirements is transferred to the  
outputs on the positive-going edge of the clock  
(CLK) pulse. Clock triggering occurs at a  
particular voltage level and is not directly related  
to the transition time of the positive-going edge of  
CLK. When CLK is at either the high or low level,  
the D input has no effect at the output.  
9 10 11 12 13  
NC – No internal connection  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP – N  
SOIC – D  
Tube  
SN74AHC174N  
SN74AHC174N  
Tube  
SN74AHC174D  
AHC174  
Tape and reel  
Tube  
SN74AHC174DR  
SN74AHC174NSR  
SN74AHC174DBR  
SN74AHC174PWR  
SN74AHC174DGVR  
SNJ54AHC174J  
–40°C to 85°C  
SOP – NS  
AHC174  
HA174  
HA174  
HA174  
SSOP – DB  
TSSOP – PW  
TVSOP – DGV  
CDIP – J  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SNJ54AHC174J  
SNJ54AHC174W  
SNJ54AHC174FK  
–55°C to 125°C  
CFP – W  
Tube  
SNJ54AHC174W  
SNJ54AHC174FK  
LCCC – FK  
Tube  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...18

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