SN54AHC139, SN74AHC139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS259K − DECEMBER 1995 − REVISED MARCH 2003
D
D
Operating Range 2-V to 5.5-V V
D
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
CC
Designed Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
D
Incorporate Two Enable Inputs to Simplify
Cascading and/or Data Reception
− 1000-V Charged-Device Model (C101)
SN54AHC139 . . . J OR W PACKAGE
SN74AHC139 . . . D, DB, DGV, N, NS
OR PW PACKAGE
SN74AHC139 . . . RGY PACKAGE
(TOP VIEW)
SN54AHC139 . . . FK PACKAGE
(TOP VIEW)
(TOP VIEW)
1
16
1G
1A
1B
1Y0
1Y1
1Y2
1Y3
GND
VCC
15 2G
1
2
3
4
5
6
7
8
16
3
2
1 20 19
18
2A
17 2B
1B
1Y0
NC
1Y1
1Y2
4
5
6
7
8
15
14
13
12
11
10
2
3
4
5
6
7
1A
1B
1Y0
1Y1
1Y2
1Y3
2G
2A
2B
2Y0
2Y1
2Y2
14
13
12
11
10
9
2A
2B
2Y0
2Y1
2Y2
2Y3
16
NC
2Y0
2Y1
15
14
9 10 11 12 13
8
9
NC − No internal connection
description/ordering information
The ’AHC139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 2-V to 5.5-V V operation.
CC
These devices are designed to be used in high-performance memory-decoding or data-routing applications
requiring very short propagation delay times. In high-performance memory systems, these decoders can be
used to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable
circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical
access time of the memory. This means that the effective system delay introduced by the decoders is negligible.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
QFN − RGY
PDIP − N
Tape and reel
Tube
SN74AHC139RGYR
SN74AHC139N
HA139
SN74AHC139N
Tube
SN74AHC139D
SOIC − D
AHC139
Tape and reel
Tape and reel
Tape and reel
Tube
SN74AHC139DR
SN74AHC139NSR
SN74AHC139DBR
SN74AHC139PW
SN74AHC139PWR
SN74AHC139DGVR
SNJ54AHC139J
−40°C to 85°C
SOP − NS
AHC139
HA139
SSOP − DB
TSSOP − PW
HA139
Tape and reel
Tape and reel
Tube
TVSOP − DGV
CDIP − J
HA139
SNJ54AHC139J
SNJ54AHC139W
SNJ54AHC139FK
CFP − W
Tube
SNJ54AHC139W
SNJ54AHC139FK
−55°C to 125°C
LCCC − FK
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2003, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
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