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SNJ54ABT373J PDF预览

SNJ54ABT373J

更新时间: 2024-11-21 01:12:59
品牌 Logo 应用领域
德州仪器 - TI 驱动信息通信管理输出元件逻辑集成电路
页数 文件大小 规格书
21页 909K
描述
OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

SNJ54ABT373J 技术参数

生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP20,.3针数:20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.4其他特性:TYP VOLP < 1V @ VCC = 5V, TA = 25 DEG C
控制类型:ENABLE LOW计数方向:UNIDIRECTIONAL
系列:ABTJESD-30 代码:R-GDIP-T20
长度:24.195 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.064 A
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP20,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:TUBE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):30 mAProp。Delay @ Nom-Sup:7 ns
传播延迟(tpd):7.7 ns认证状态:Not Qualified
筛选级别:MIL-PRF-38535座面最大高度:5.08 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:BICMOS
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

SNJ54ABT373J 数据手册

 浏览型号SNJ54ABT373J的Datasheet PDF文件第2页浏览型号SNJ54ABT373J的Datasheet PDF文件第3页浏览型号SNJ54ABT373J的Datasheet PDF文件第4页浏览型号SNJ54ABT373J的Datasheet PDF文件第5页浏览型号SNJ54ABT373J的Datasheet PDF文件第6页浏览型号SNJ54ABT373J的Datasheet PDF文件第7页 
SN54ABT373, SN74ABT373  
OCTAL TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SCBS155D – JANUARY 1991 – REVISED MAY 1997  
SN54ABT373 . . . J OR W PACKAGE  
SN74ABT373 . . . DB, DW, N, OR PW PACKAGE  
(TOP VIEW)  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD-17  
OE  
1Q  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
Typical V  
(Output Ground Bounce) < 1 V  
8Q  
8D  
7D  
OLP  
at V  
= 5 V, T = 25°C  
1D  
2D  
CC  
A
High-Drive Outputs (–32-mA I , 64-mA I  
OH  
)
OL  
2Q  
3Q  
16 7Q  
15 6Q  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK),  
Ceramic Flat (W) Package, and Plastic (N)  
and Ceramic (J) DIPs  
14  
13  
12  
11  
3D  
4D  
4Q  
GND  
6D  
5D  
5Q  
LE  
description  
SN54ABT373 . . . FK PACKAGE  
(TOP VIEW)  
The eight latches of the ’ABT373 are transparent  
D-type latches. While the latch-enable (LE) input  
is high, the Q outputs follow the data (D) inputs.  
When LE is taken low, the Q outputs are latched  
at the logic levels set up at the D inputs.  
3
2
1
20 19  
18  
2D  
2Q  
3Q  
3D  
4D  
8D  
7D  
7Q  
6Q  
4
5
6
7
8
17  
16  
15  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low logic levels) or  
a
14 6D  
9 10 11 12 13  
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and  
increased drive provide the capability to drive bus  
lines without need for interface or pullup  
components.  
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN54ABT373 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74ABT373 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each latch)  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SNJ54ABT373J 替代型号

型号 品牌 替代类型 描述 数据表
5962-9074601MRA TI

完全替代

具有三态输出的八路透明 D 型锁存器 | J | 20 | -55 to 125
5962-9321801QRA TI

完全替代

具有三态输出的八路透明 D 型锁存器 | J | 20 | -55 to 125
SNJ54BCT373J TI

完全替代

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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