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SNJ54ABT377FK PDF预览

SNJ54ABT377FK

更新时间: 2024-09-15 22:42:55
品牌 Logo 应用领域
德州仪器 - TI 触发器锁存器逻辑集成电路信息通信管理时钟
页数 文件大小 规格书
14页 462K
描述
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE

SNJ54ABT377FK 技术参数

生命周期:Active零件包装代码:QLCC
包装说明:QCCN, LCC20,.35SQ针数:20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
Factory Lead Time:6 weeks风险等级:5.35
其他特性:WITH HOLD MODE系列:ABT
JESD-30 代码:S-CQCC-N20长度:8.89 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:150000000 Hz最大I(ol):0.048 A
位数:8功能数量:1
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出极性:TRUE
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QCCN
封装等效代码:LCC20,.35SQ封装形状:SQUARE
封装形式:CHIP CARRIER包装方法:TUBE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):30 mAProp。Delay @ Nom-Sup:7.6 ns
传播延迟(tpd):7.6 ns认证状态:Not Qualified
筛选级别:MIL-PRF-38535座面最大高度:2.03 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:BICMOS
温度等级:MILITARY端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:8.89 mm最小 fmax:150 MHz
Base Number Matches:1

SNJ54ABT377FK 数据手册

 浏览型号SNJ54ABT377FK的Datasheet PDF文件第2页浏览型号SNJ54ABT377FK的Datasheet PDF文件第3页浏览型号SNJ54ABT377FK的Datasheet PDF文件第4页浏览型号SNJ54ABT377FK的Datasheet PDF文件第5页浏览型号SNJ54ABT377FK的Datasheet PDF文件第6页浏览型号SNJ54ABT377FK的Datasheet PDF文件第7页 
SN54ABT377, SN74ABT377  
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH CLOCK ENABLE  
SCBS156B – FEBRUARY 1991 – REVISED JULY 1994  
SN54ABT377 . . . J PACKAGE  
SN74ABT377 . . . DB, DW, OR N PACKAGE  
(TOP VIEW)  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
Latch-Up Performance Exceeds 500 mA  
Per JEDEC Standard JESD-17  
CLKEN  
1Q  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
Typical V  
(Output Ground Bounce)  
8Q  
8D  
7D  
7Q  
6Q  
6D  
OLP  
CC  
< 1 V at V  
= 5 V, T = 25°C  
1D  
2D  
2Q  
3Q  
A
High-Drive Outputs (32-mA I  
,
OH  
64-mA I  
)
OL  
Package Options Include Plastic  
3D  
Small-Outline (DW) and Shrink  
4D  
4Q  
13 5D  
12 5Q  
Small-Outline (DB) Packages, Ceramic  
Chip Carriers (FK), and Plastic (N) and  
Ceramic (J) DIPs  
11  
GND  
CLK  
description  
SN54ABT377 . . . FK PACKAGE  
(TOP VIEW)  
The ABT377 are 8-bit positive-edge-triggered  
D-type flip-flops with a clock (CLK) input. They are  
particularly suitable for implementing buffer and  
storage registers, shift registers, and pattern  
generators.  
3
2
1
20 19  
18 8D  
2D  
2Q  
3Q  
3D  
4D  
4
5
6
7
8
Data (D) input information that meets the setup  
time requirements is transferred to the Q outputs  
on the positive-going edge of the clock pulse if the  
commonclock-enable(CLKEN)inputislow. Clock  
triggering occurs at a particular voltage level and  
is not directly related to the transition time of the  
positive-going pulse. When the buffered clock  
(CLK) input is at either the high or low level, the  
D input signal has no effect at the output. The  
circuits are designed to prevent false clocking by  
transitions at CLKEN.  
17  
16  
15  
14  
7D  
7Q  
6Q  
6D  
9 10 11 12 13  
The SN74ABT377 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count  
and functionality of standard small-outline packages in less than half the printed-circuit-board area.  
The SN54ABT377 is characterized for operation over the full military temperature range of 55°C to 125°C. The  
SN74ABT377 is characterized for operation from 40°C to 85°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
CLKEN CLK  
D
X
H
L
H
L
X
Q
0
H
L
L
X
H or L  
X
Q
0
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1994, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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